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參數(shù)資料
| 型號： | AN6105FHN |
| 英文描述： | For Information·Communication - Cellular Phone |
| 中文描述： | 信息·通訊-手機(jī) |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 136K |
| 代理商： | AN6105FHN |
AN6105FHN
3
SDM00005BEB
■
Electrical Characteristics at T
a
=
25
°
C (continued)
Unless otherwise specified, V
CC
=
2.8 V, V
SLP
=
2.8 V, V
GC
=
2.5 V, V
LO
=
10 dBm: f
=
223.7 MHz, V
IN
: f
=
112.35
MHz, V
I
, V
IX
, V
Q
, V
QX
: f
=
500 kHz, a measurement for high impedance be made for V
I
, V
IX
, V
Q
and V
QX
.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input IP3
IIP3
Input IP3 value at 60 dB ± 1 dB of
conversion gain
65
69
dB
μ
V
Gain adjustment sensitivity
β
GCA
Gain variation at V
GC
= 0.5 V to 2.5 V
V
GC
=
1.5 V, V
IN
=
47 dB
μ
V
42
45
48
dB/V
Quadrature demodulation error
IQ
ERR
20
25
10
20.5
7
dB
Local signal input level
V
LO
dBm
Sleep control (low)
V
SLP(1)
Voltage to get I
TOT
of 10
μ
A and less
0.2
V
Sleep control (high)
V
SLP(2)
Voltage for an operating mode
2.3
V
Gain adjustment voltage
V
GC
V
IQ
0.1
2.6
V
IQ operating point voltage
DC operating point voltage at no
adjustment for IQ output (pin 5, pin 6,
pin 8 and pin 9)
1.2
1.5
1.7
V
IQ operating point deviation
V
IQ
DC operating point voltage difference
between V
I
-V
IX
and V
Q
-V
QX
(at no
adjustment)
250
0
250
mV
Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
IQ output deviation
V
IQ
Level ratio between IQ signals
(differential),
V
GC
=
1.5 V, V
IN
=
47 dB
μ
V
0.8
0
0.8
dB
IQ output phase difference
θ
IQ
Phase difference between IQ signals
(differential),
V
GC
=
1.5 V, V
IN
=
47 dB
μ
V
85
90
95
deg
■
Terminal Equivalent Circuits
Pin No.
Equivalent circuit
Description
DC voltage (V)
1
GND (GCA):
Ground pin of GCA system.
2, 3, 4
Pin 2: I, Q output operating point adjustment:
Pin to adjust an operating point voltage
of IQ output (pin 5, pin 6, pin 8 and pin 9).;
Pin3: Q operating point offset adjustment:
Pin to adjust an offset voltage between Q,
Q output (pin 5, pin 6).;
Pin 4: I operating point offset adjustment:
Pin to adjust an offset voltage between I,
I output (pin 8, pin 9).
1.9
20 k
40 k
150 k
20 k
40 k
Pin
2, 3, 4
V
CC
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