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參數(shù)資料
| 型號： | AN5308 |
| 廠商： | Panasonic Corporation |
| 英文描述： | Single chip IC for color TV Built-in I2C bus interface |
| 中文描述： | 單彩色電視內置的I2C總線接口芯片IC |
| 文件頁數(shù)： | 9/25頁 |
| 文件大?。?/td> | 273K |
| 代理商： | AN5308 |
ICs for TV
AN5308NK
9
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Horizontal signal processing (continued)
F.B.P slice level (blanking)
V
FBP
1
0.7
V
F.B.P slice level (AFC1)
V
FBP
2
2.5
V
F.B.P delay time range
T
H
FBP
H-center: typ. From H
OUT
rising
edge to FBP center
19
μ
s
B.G.P start position
From H. sync. rear edge to burst
gate pulse front edge
0.3
μ
s
Sandcastle pulse output temperature
V
60(Ta)
characteristics
1.8
mV/deg
Sandcastle pulse input threshold
level temperature characteristics
V
59(Ta)
0
mV/deg
F.B.P input threshold level
temperature characteristics (HBLK)
V
61(Ta)
1.8
mV/deg
F.B.P input threshold level
temperature characteristics (AFC1)
1
mV/deg
X-ray inside reference temperature
characteristics
Zener temperature characteristics:
+
1.8 mV/deg
0
mV/deg
Sandcastle pulse output vs. supply
voltage dependence (BGP)
V
CC2
: 5 V
±
0.5 V
1
V/V
Sandcastle pulse output vs. supply
voltage (HBLK)
V
CC2
: 5 V
±
0.5 V
0.74
V/V
Sandcastle pulse output vs. supply
voltage (VBLK)
V
CC2
: 5 V
±
0.5 V
0.44
V/V
Hold down operation voltage
V
HTH
V
REF
(
=
pin 6)
=
6.2 V
2.71
2.81
2.91
V
Vertical signal processing
Vertical BLK phase (wide)
PVBLK(W)
Period from VBLK rising edge to
vertical sync. falling edge
3.87
ms
Vertical BLK phase (normal)
PVBLK
Period from VBLK rising edge to
vertical sync. falling edge
0.2
ms
Neck break operation pin 60 voltage
V
60
Pin 6: 1.5 V
1.5
V
Vertical BLK pulse width (wide)
TVBLK(W)
5.05
ms
Y-signal processing
Contrast variable range
Ay
G(CON)min
Contrast: min.
40
dB
Y-output amplitude V
CC
dependence
y
G(V
CC
)
0.4
dB/V
Y-output DC voltage V
CC
dependence
y
G(V
CC
)
0.18
V/V
Y-noise level
VY
NL
7
50
mV
Delay line dynamic range
V
DLmax
0.7
V
I
Electrical Characteristics at T
a
=
25
°
C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
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相關代理商/技術參數(shù) |
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|---|---|
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