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| 型號： | AN4999 |
| 英文描述： | Turn-on of thyristors in parallel |
| 中文描述： | 打開的晶閘管并聯(lián) |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 102K |
| 代理商： | AN4999 |
3/6
AN4999 Application Note
www.dynexsemi.com
crossover point the reverse is true. The maximum and minimum
of the production spread are shown.
Thus, at low currents without good control, the hotter devices
will tend to become even hotter . Fortunately, at high currents
the opposite is true and a self sharing effect takes over.
Stage 3 - Busbar connections
The least considered part of the paralleling exercise is usually
the interconnections. Unless the conductors linking each device
to the common power connections are of equal lengths the
devices will not share. All this in spite of the careful parallel
banding in stage 1, above. Fig 3 shows diagramatically a
cylindrical arrangement with equal length connections and,
clearly, this is not easy to achieve for high current devices. More
typical is the non-symmetrical arrangement of Fig 4. If tightly
banded devices are used in such an arrangement poor current
sharing is the most likely result! Some positions in the connection
will be seen to be current
‘
hoggers
’
and others current
‘
shunners
’
.
When more than 2 devices are paralleled, experience has shown
that it is better to have devices spread across a fairly wide Vf
band. 200mV is about right. The user then fits high Vf devices
into current
‘
hogger
’
positions and low Vf ones into current
‘
shunner
’
positions. This approach usually gives a satisfactory
result.
THYRISTORS - CURRENT SHARING AT TURN-ON
All the procedures described above are also essential for good
sharing of thyristors at turn-on.The additional requirement is for
thyristors to turn on as near together in time as possible,
otherwise the average current in a late turning on thyristor is
less than in the other (normal speed) devices. Note that turn-on
problems only occur in a minimum of situations and only for
some device types.
Unequal conduction due to delay time variations and gate
drive performance:
Even if all the thyristor gates are triggered at the same time,
variations in
delay time
will lead to variations in turn-on time.
Experience has shown that, provided high gate currents are
used, delay time differences are small for a particular thyristor
type. Selection on delay time is only necessary for sensitive
applications.
At low gate drives the devices turn on adequately but there are
significant variations in the delay times. As gate currents are
increased the delay time variations become smaller until an
optimum gate current is reached where there are no further
reductions. Similar comments apply regarding gate current rise
time where further reductions in rise time have no effect.
Happily, a high current, fast rising gate pulse also gives a good
thyristor di/dt rating.
Gate pulse length
has some effect on sharing performance
but only when the thyristor load current source is low voltage.
This is particularly true for amplifying gate devices. For example,
a thyristor switching a 50Hz, 10V rms ac current source is unlikely
to switch on until about 700us from voltage zero.
t
0
t
1
t
2
O
On-state voltage
V
Device
A
Device
B
Finger voltage points
Low voltage supply
Thyristor forward voltage
Low voltage supply
Thyristor forward voltage
Finger voltage
Device B
Finger voltage
Device B
Fig. 5 Finger voltages
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