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參數(shù)資料
| 型號： | AN3662FBP |
| 廠商： | PANASONIC CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 14 X 14 MM, PLASTIC, QFH-64 |
| 文件頁數(shù)： | 17/34頁 |
| 文件大?。?/td> | 435K |
| 代理商： | AN3662FBP |
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AN3662FBP
ICs for VCR
24
I Technical Data (continued)
[2] I2C bus of this IC (continued)
1. Serial control timing specification (continued)
3) Recommended operating conditions
Conditions
Symbol
Typ
Max
Unit
Bus free time between stop and start conditions
tBUF
4.7
s
Hold time start condition (The first clock pulse is generated after
tHD : STA
4.0
s
this period.)
Low state hold time of clock
tLOW
4.7
s
Rise time of data and clock signal
tr
1 000
ns
Setup time of stop condition
tSU : STO
4.0
s
Data setup time
tSU : DAT
250
ns
High state hold time of clock
tHIGH
4.0
s
Fall time of data and clock signal
tf
300
ns
Data hold time
tHD : DAT
5.0
s
Clock frequency
tSCL
0
100
kHz
2. Data specification
1) Slave address
:
2) Slave address format :
3) Sub-address bite and data bite format
AN3662FBP serial mode
Sub address
D7
D6
D5
D4
D3
D2
D1
D0
(HEX)
Rec./PB
HiFi input select
Normal input select
00
0
= PB
0, 0
= MTS
0, 0
= SAP
1
= Rec.
0, 1
= Ext.1
0, 1
= R-ch.
1, 0
= Ext.2
1, 0
= L-ch.
1, 1
= Ext.3
1, 1
= R/L-Mix.
01
Line out gain
Normal detection
Output mode select
Output channel select
0
= 6.0 dBS
0, 0
= high
0, 0
= HiFi
0, 0
= stereo
1
= 7.5 dBS
0, 1
= middle
0, 1
= mix.
0, 1
= L-ch.
1, 0
= low
1, 0
= normal
1, 0
= R-ch.
1, 1
= off
1, 1
= BS mon.
1, 1
= XXXX
02
Rec. FM mix. ratio
DOC select ENV select VCC2 select
0, 0
= 11 dB
0
= on
0
= ENV
0
= 9 V
0, 1
= 10 dB
1
= off
(linear)
1
= 12 V
1, 0
= 9 dB
1
= forced
1, 1
= 8 dB
normal (0/5 V)
Note) The underlined figures stand for the initial state.
11101010
SA
A
Slave addr.
Sub addr.
Data byte A
P
Start condition Acknowledge bit
Stop condition
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