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參數資料
| 型號： | AN3042QC |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | PCI Controller(PCI控制器) |
| 中文描述： | PCI控制器（的PCI控制器） |
| 文件頁數： | 1/4頁 |
| 文件大小： | 192K |
| 代理商： | AN3042QC |
CO-M EM Lite
PCI Controller
AN3042QC
The CO-MEM Lite chip provides a simple way to interface a micro-
processor to the PCI bus. The chip’s internal 16-Kbyte RAM is used as
a shared memory buffer between the local microprocessor and the PCI
bus. An I
O messaging unit facilitates communications between the
host and local software.
The CO-MEM Lite chip’s dual-port memory appears in both the local
microprocessor and PCI address spaces, and can simultaneously be
accessed from both sides. In addition, the chip can become a PCI bus
master to move any data block up to 16 Kbytes using the full-burst
capabilities of the PCI bus.
The CO-MEM Lite chip provides a direct access mechanism from the
local bus to the PCI bus. With it, the local processor can direct the chip
to run a PCI bus master cycle of any kind to any address. This means
that the CO-MEM Lite chip can be used as a host bridge and can run
PCI configuration cycles. It also provides a convenient mechanism for
the local processor to retrieve and post I
2
O message buffers to other
I
2
O agents.
Using the CO-MEM Lite chip on a board is simple and efficient. The
combination of a fully-compliant PCI interface, on-chip memory, and a
configurable microprocessor interface means that few external
components are necessary for complete peripheral implementation.
The CO-MEM Lite chip’s PCI interface supports both master and slave
modes, along with 3V or 5V signaling. A 3.3V power supply and
streamlined TQFP package complete the picture making the CO-MEM
Lite chip the ideal PCI peripheral controller chip for today’s designs.
Features
PCI 2.1 bus master/slave
interface
Configurable interface to
allow direct connect to
many microprocessors
Data bus widths of 8, 16,
or 32 bits
I
nterrupt generation to
both host and local
systems
Embedded host-bridge
capability
16 Kbytes of shared
memory for long burst
cycles on the PCI bus
Supports PCI 3V and 5V
signaling requirements
Looks like RAM to the
local processor
I
2
O message unit
Local interface clock
speeds up to 50 MHz
3.3V power supply
160 TQFP package
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