參數(shù)資料
型號(hào)： AN2821
英文描述： eTPU Host Interface
中文描述： eTPU主機(jī)接口
文件頁(yè)數(shù)： 3/24頁(yè)
文件大小： 546K
代理商： AN2821
eTPU and Host Interface Hardware
eTPU Host Interface, Rev. .1
Freescale Semiconductor
3
3
eTPU and Host Interface Hardware
The host interface hardware for the eTPU is shown in
eTPU Host Interface Hardware
. The host and eTPU
can communicate to each other via event or by data.
The host has access to all eTPU host interface registers. When the host wants the eTPU’s services, it can
issue the host service request (HSR) by writing the eTPU channel control registers. Once the host service
request is acknowledged, a thread of eTPU code associated with this HSR is activated for execution. The
eTPU code in the thread implements the functions requested by the host. When eTPU needs the host
service, it can issue the interrupt request or DMA data transfer request, or generate a global exception. The
events handling logic is needed in the host software to provide services to the eTPU corresponding to these
requests.
The eTPU code memory (RAM) and data memory (RAM) are accessible by both host and eTPU. eTPU
code memory stores the eTPU executable binary image. At the power up initialization, following the
defined sequences, the host transfers the eTPU code stored in the flash memory to the eTPU code memory.
During the execution, the eTPU micro-engine fetches the micro-instructions from the code memory.
Figure 1. eTPU Host Interface Hardware
The eTPU data memory is implemented by using tri-port RAM. It provides for data sharing between the
host and eTPU engines. Both host and eTPU can read and write the eTPU data memory in any data size
(8, 16, 24, and 32 bit). Since the eTPU data bus is 24 bits wide, it is best to pack together a data word with
an 8 bit value and a 24 bit value in order to reduce data memory utilization. To reduce the overhead of
packing and unpacking the data, a virtual mirror memory space of the normal eTPU data memory has been
created. The virtual memory space is called Parameter Sign Extension (PSE) memory space. When the
host reads the 32-bit data from the PSE memory space, it will return the sign extended 24-bit data. The
conversion is needed if the 24-bit data is unsigned. Similarly, when the host writes the 32-bit data to the
eTPU PSE memory, only the three least significant bytes will be written to the eTPU data memory. The
most significant byte is untouched.
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