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參數(shù)資料
| 型號(hào)： | AN2018 |
| 廠商： | Panasonic Corporation |
| 英文描述： | JT 4C 4#16 SKT RECP |
| 中文描述： | 相關(guān)雙采樣集成電路 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 28K |
| 代理商： | AN2018 |
I
Block Diagram
AN2018S
Correlated Double Sampling IC
I
Overview
The AN2018S is used to reduce noise in CCD im-
age sensor output signal. It performs correlated double-
sampling on image signal sent from a CCD sensor to
output clearer image signal.
I
Features
Operating on low voltage (V
CC
=4.8V), consuming
little current (I
CC
=12.7mA typ.)
Including a high-speed sampling circuit responding
to 510-830H CCD
6dB or 9dB fixed gain
83-dB high S/N-ratio (at 6dB output)
8
7
6
5
1
2
3
4
6dB OUT
GND
SP1
SP2
9dB OUT
BLK
SIG.IN
V
CC
9dB
6dB
S / H
S / H
BLK
BIAS
+
–
50k
+
–
CDS output (9dB)
Blanking pulse input
CCD signal input
V
CC
Sampling pulse input (2)
Sampling pulse input (1)
GND
CDS output (6dB)
Pin No.
1
2
3
4
5
6
7
8
Pin name
I
Pin Descriptions
Unit:mm
6.5
±
0.3
4.2
±
0.3
0
±
0
0
1
0
±
0
0
0
1
±
0
5
±
0
0.3
8-Pin SOP Package (SOP008-P-0225)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AN2018S | 制造商:Panasonic Industrial Company 功能描述:IC |
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