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參數(shù)資料
| 型號： | AN1746 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | Migrating from the MC68HC705K1 to the MC68HC705KJ1 |
| 中文描述： | 從MC68HC705K1遷移到MC68HC705KJ1 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 308K |
| 代理商： | AN1746 |
Application Note
AN1746
SWPDI
Thesoftwarepulldowninhibitbithasthesamefunctionalityonbothparts
but is found at bit 3 of the KJ1 MOR.
PIN3
Since the KJ1 does not have a 3-pin oscillator option, this option is not
found on the KJ1 MOR.
RC
The RC option on the K1 was used to distinguish between using an
external RC network or an external crystal, ceramic resonator, or clock
source. The KJ1 configures its oscillator with the OSCRES bit.
SWAIT
The STOP conversion to wait bit has the same functionality on both
parts.
LVRE
The KJ1 does not have a low-voltage reset function. This option is not
found in the KJ1 MOR.
PIRQ
The port A IRQ enable bit has the same functionality on both parts.
LEVEL
The external interrupt sensitivity bit has the same functionality on both
parts.
C OPEN
The COP enable bit has the same functionality on both parts.
SOSC D
The short oscillator delay bit controls the oscillator stabilization counter.
The normal stabilization delay following reset or exit from stop mode is
4064 bus cycles. Setting the SOSCD enables a 128-bus cycle
stabilization delay. If your oscillator design has a quick startup time, the
SOSCD bit will allow quicker recovery from oscillator startup. Setting the
bit to a 1 enables the short oscillator delay.
EPMSEC
To protect your software investment, the KJ1 provides the designer the
added functionality of securing the EPROM array. When this bit is set,
external access of the EPROM array is denied.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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