參數(shù)資料
型號: AN1241D
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Interfacing the MC68HC705J1A to 9356/9366 EEPROMs
中文描述: 接口的MC68HC705J1A的九千三百六十六分之九千三百五十六的EEPROM
文件頁數(shù): 17/21頁
文件大?。?/td> 253K
代理商: AN1241D
AN1241/D
17
*** Subroutine to write 16 bit data ******************************************
J9356_WR_DATA ldx #16T ;init counter for LOOP4
* Write the serial output pin with data
J9356_LOOP4 brclr 7,DATA_H,J9356_L4_2 ;if addr bit7 = 0, goto L4_2
bset SER_OUT,PORTA ;ser_out = 1
bra J9356_L4_3 ;goto L4_3
J9356_L4_2 bclr SER_OUT,PORTA ;ser_out = 0
* Clock the serial clock pin
J9356_L4_3 bset SER_CLK,PORTA ;ser_clk = 1
bclr SER_CLK,PORTA ;ser_clk = 0
asl DATA_L ;rotate the DATA_L
rol DATA_H ;rotate the DATA_H
decx ;decrease counter loop
bne J9356_LOOP4 ;is LOOP4 finished
rts ;return
*** Subroutine to read 16 bit data ***************************************
J9356_RD_DATA ldx #16T ;init counter for LOOP3
* Read the serial input pin
J9356_LOOP3 brclr SER_IN,PORTA,J9356_L3 ;carry bit = serial in
J9356_L3 rol DATA_L ;rotate left result
rol DATA_H
* Clock the serial clock pin
bset SER_CLK,PORTA ;ser_clk = 1
bclr SER_CLK,PORTA ;ser_clk = 0
decx ;decrease counter loop
bne J9356_LOOP3 ;is LOOP3 finished
rts ;return
* Wait until write cycle is over
J9356_WAIT bset CS,PORTA ;CS line is high
J9356_W2 clra
sta COPR ;kick the wdog
brclr SER_IN,PORTA,J9356_W2
bclr CS,PORTA ;CS line is low
rts ;return
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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