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參數(shù)資料
| 型號： | AN114 |
| 英文描述： | Interfacing the X9408/X9418 XDCP to 8051 Microcontrollers |
| 中文描述： | 數(shù)字電位器的接口X9408/X9418的8051微控制器 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 262K |
| 代理商： | AN114 |
Application Note
1 of 12
www.xicor.com
REV 1.1 11/12/02
AN 114
Interfacing the X9408/X9418 XDCP to 8051 Microcontrollers
by Applications Staff,
This application note describes the routines for the
control of an X9408 or X9418 digitally controllable
potentiometer. The X9408/X9418 devices have a variety
of different instructions that provide flexibility to the
designer. Additionally, the nonvolatile nature of the
device allows for stored wiper positions that can be
retrieved after power cycles.
The following code implements all of the available
X9408/X9418 instructions using a standard bi-direc-
tional bus protocol. Although the subroutines occupy
about 300 bytes of program memory, designers who
won't need to implement all of the instructions can
shorten the code by removing any unnecessary routines.
However, this will necessitate the reassembly of the
code.
For those instructions which program the nonvolatile
data registers (XFR_WCR, GXFR_WCR, &
WRITE_DR), acknowledge polling has been imple-
mented to determine an early completion of the internal
write cycle. Although this is automatically handled by
the routines, a word or two regarding the procedure
should be informative. After issuing a start condition, the
master sends a slave address and receives an acknowl-
edge. It then issues an instruction byte to the X9408/
X9418 and again receives an acknowledge. If necessary,
it now transmits the data byte and receives a final
acknowledge. The master must then initiate a stop condi-
tion which will cause the X9408/X9418 to begin an
internal write cycle. The X9408/X9418 pins go to high
impedance until this internal cycle is complete. The
Figure 1. Connecting the X9408 to an 80C51 microcontroller
+5V
-5V
U1
80C51
21
22
23
24
25
26
27
28
17
10
14
15
16
29
30
11
31
9
19
18
39
38
37
36
35
34
33
32
1
2
3
4
5
6
7
8
12
13
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
RD
RXD
T0
T1
WR
PSEN
ALE/P
TXD
EA/VP
RST
X1
X2
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
INT0
INT1
U2
X9408
19
15
14
16
22
21
23
1
24
13
17
7
18
5
8
20
3
4
2
10
11
9
VSS
VH2
VW2
VL2
VH3
VW3
VL3
VCC
V+
SCL
SDA
A3
A2
A1
A0
VH0
VW0
VL0
VH1
VW1
VL1
V-
R1
10K
R2
10K
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