參數(shù)資料
型號(hào)： AN-53
廠商： Fairchild Semiconductor Corporation
元件分類(lèi)： DC/DC變換器
英文描述： Implementing an RC5051 DC-DC Converter on Pentium II Motherboards
中文描述： 推行RC5051的DC - DC轉(zhuǎn)換器的奔騰II主板
文件頁(yè)數(shù)： 8/20頁(yè)
文件大小： 143K
代理商： AN-53
AN53
APPLICATION NOTE
8
Two MOSFETs in parallel.
If output current is high, We recommend two MOSFETs
used in parallel instead of one single MOSFET. The follow-
ing significant advantages are realized using two MOSFETs
in parallel:
Significant reduction of Power dissipation
.
Example: RC5051 with Maximum output current of 14A
at 2.8V with one MOSFET on the high side:
P
MOSFET
= (I
2
R
DS,ON
)(Duty Cycle) =
(14A)
2
(0.050
W
)(2.8V / 5V) = 5.5W
With two MOSFETs in parallel:
P
MOSFET
= (I
2
R
DS,ON
)(Duty Cycle) =
(14A/2)
2
(0.037
W
) (2.8V / 5V) = 1.0W/FET
*
Note:
R
DS,ON
increases with temperature. Assume R
DS,ON
=
25m
W
at 25
°
C. R
DS, ON
can easily increase to 50m
W
at high tempera-
ture when using a single MOSFET. When using two MOSFETs in par-
allel, the temperature effects should not cause the R
DS, ON
to rise as
much.
Smaller heat sink required.
With power dissipation down to around one watt,
considerably less heat sink is required.
Reliability.
With thermal management under control, this DC-DC
converter is able to deliver load currents up to 14.5A with
no performance or reliability concerns.
MOSFET Gate Bias.
As already discussed, the low-side MOSFET on the
RC5051 needs only 5V for its gate drive supply. The high-
side MOSFET can be biased by one of two methods:
Charge Pump or 12V Gate Bias.
Method 1. Charge pump (or Bootstrap) method.
Figure 4 displays the use of a charge pump to provide gate
bias to the high-side MOSFET with the RC5051.
Capacitor CP is the charge pump deployed to boost the
voltage of the RC5051 output driver. When the MOSFET
switches off, the source of the MOSFET is at
approximately 0V. VCCQP is charged through the
Schottky diode D1 to approximately 4.5V. Thus, the
capacitor CP is charged to approximately 4.5V. When the
MOSFET turns on, the source of the MOSFET voltage is
equal to 5V. The capacitor voltage follows, and hence
provides a voltage at VCCQP equal to approximately 10V.
The Schottky diode D1 is required to provide the charge
path when the MOSFET is off, and reverses bias when the
VCCQP goes to 10V. The charge pump capacitor, CP,
needs to be a high Q, high frequency capacitor. A 1
m
F
ceramic capacitor is recommended here.
Figure 4. Charge Pump Configuration
Method 2. 12V Gate Bias.
Figure 5 illustrates how a 12V source can be used to bias the
VCCQP. A 47
W
resistor is used to limit the transient current
into the VCCQP pin and a 1
m
F capacitor filter is used to filter
the VCCQP supply. This method provides a higher gate bias
voltage (V
GS
) to the MOSFET than the charge-pump method
does, and therefore reduces the
R
DS, ON
of the MOSFET and
thus reduces the power loss due to the MOSFET. Figure 6
shows how
R
DS, ON
reduces dramatically with V
GS
increases.
A 6.2V Zener diode (D1) is placed from VCCQP to 5V to
clamp the voltage at VCCQP to a maximum of 12V and
ensure that the absolute maximum voltage of the IC will not
be exceeded
.
Figure 5. 12V Gate Bias Configuration
Figure 6. R
DS,ON
vs. V
GS
for Selected MOSFETs
PWM/PFM
Control
65-5051-06
VO
+5V
D1
D2
CP
Q1
Q2
L2
RS
C
OUT
VCCQP
HIDRV
LODRV
GNDP
PWM/PFM
Control
65-5051-07
VO
+5V
+12V
D2
1
μ
F
Q1
Q2
L2
RS
47
D1
VCCQP
HIDRV
LODRV
GNDP
C
OUT
IRL2203NS
NDP6030L
FDP7030L
NDB603AL
R
W
)
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