參數資料
型號: AN-37
英文描述: LinkSwitch-TN Design Guide
中文描述: 的LinkSwitch - TN設計指南
文件頁數: 8/16頁
文件大?。?/td> 155K
代理商: AN-37
AN-37
8
A
1/04
the low output currents of
LinkSwitch-TN
applications, are
normally not significant.
The conduction mode CCM or MDCM of a Buck or Buck-
Boost converter primarily depends on input voltage, output
voltage, output current and device current limit. The input
voltage, output voltage and output current are fixed design
parameters therefore the
LinkSwitch-TN
(current limit) is the
only design parameter that sets the conduction mode.
The phrase “mostly discontinuous” is used as with on-off
control, since a few switching cycles may exhibit continuous
inductor current, the majority of the switching cycles will be in
the discontinuous conduction mode. A design can be made
fully discontinuous but that will limit the available output
current, making the design less cost effective.
Step-by-Step Design Procedure
Step 1. Determine System Requirements VAC
MIN
,
VAC
MAX
, P
O
, V
O
, f
L
,
η
Determine the input voltage range from Table 8.
Line Frequency, f
L
: 50 or 60 Hz, for half-wave rectification
use f
/2.
Output Voltage, V
O
: in Volts.
Output Power, P
: in Watts.
Power supply efficiency,
η
: 0.7 for a 12 V output, 0.55 for a
5 V output if no better reference data available.
Step 2. Determine AC Input Stage
The input stage comprises fusible resistor(s) input rectification
diodes and line filter network. The fusible resistor should be
chosen as flame proof and depending on the differential line
input surge requirements, a wire wound type may be required.
The fusible resistor(s) provides fuse safety, inrush current
limiting and differential mode noise attenuation.
For designs
1 W it is lower cost to use half-wave rectification,
>1 W full wave rectification (smaller input capacitors). The
EMI performance of half wave rectified designs is improved by
adding a second diode in the lower return rail. This provides
EMI gating (EMI currents only flow when the diode is
conducting) and also doubles differential surge withstand as the
surge voltage is shared across two diodes. Table 9 shows the
recommended input stage based on output power for a universal
input design while Table 10 shows how to adjust the input
capacitance for other input voltage ranges.
P
OUT
0.25 W
0.25-1 W
> 1 W
Table 9. Recommended AC Input Stages For Universal Input.
PI-3774-121603
+
AC IN
R
F1
L
IN
D
IN1-4
C
IN2
C
IN1
**
PI-3773-121603
+
AC
IN
R
F1
L
IN
D
IN1
D
IN2
**
*
C
IN2
C
IN1
PI-3772-121603
+
IN
R
F1
R
F2
D
IN1
D
IN2
**
*
C
IN2
C
IN1
PI-3771-121603
+
AC
IN
R
F1
R
F2
D
IN1
D
IN2
C
IN
**
*
*
85-265 VAC
Input Stage
R
, R
: 100-470
,
0.5 W, Fusible
C
IN
:
2.2
μ
F, 400 V
D
, D
IN2
: 1N4007, 1 A,
1000 V
R
F1
: 8.2
, 1 W Fusible
R
: 100
, 0.5 W,
Flame proof
C
, C
:
3.3
μ
F,
400 V each
D
, D
IN2
: 1N4007, 1 A,
1000 V
R
F1
: 8.2
, 1 W Fusible
L
: 470
μ
H-2.2 mH,
0.05 A-0.3 A
C
, C
:
4
μ
F/W
OUT
,
400 V each
D
, D
IN2
: 1N4007, 1 A,
1000 V
R
F1
: 8.2
, 1 W Fusible
L
: 470
μ
H-2.2 mH,
0.05 A-0.3 A
C
, C
:
2
μ
F/W
OUT
,
400 V each
D
, D
IN2
: 1N4005, 1 A,
600 V
*Optional for improved EMI and line surge performance. Remove for designs requiring no impedance in return rail.
**Increase value to meet required differential line surge performance.
Comments
Input (VAC)
100/115
230
Universal
VAC
MIN
85
195
85
VAC
MAX
132
265
265
Table 8. Standard Worldwide Input Line Voltage Ranges.
AC Input
Voltage (VAC)
100/115
230
Universal
Half Wave
Rectification
6-8
1-2
6-8
Full Wave
Rectification
3-4
1
3-4
Table 10. Suggested Total Input Capacitance Values for Different
Input Voltage Ranges.
Total Capacitance C
IN(TOTAL)
μ
F/P
OUT
(C
IN1
+ C
IN2
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