Advanced Monolithic Systems, Inc.
www.advanced-monolithic.com Phone (925) 443-0722 Fax (925) 443-0723
AMS2115
PIN FUNCTIONS
S/D (Pin 1)
This is a shutdown pin that provides GATE drive latchoff
capability. The pin is also the input to a comparator referenced to
V
REF
(1.25V). When the pin pulls above
V
REF
, the comparator
latches the gate drive to the external MOSFET off. The comparator
typically has 150mV of hysteresis and the Shutdown pin can be
pulled low to reset the latchoff function. This pin provides
overvoltage protection or thermal shutdown protection when
driven from various resistor divider schemes. S/D pin is clamped
at 2.5V.
V
IN
(Pin 2)
This is the input supply for the IC that powers the majority of
internal circuitry and provides sufficient gate drive compliance for
the external N-channel MOSFET. The typical supply voltage is 12
with 4.5 mA of quiescent current. The maximum operating
V
IN
is
20V and the MOSFET at max.
I
OUT
+ 1.6V (worst-case
V
IN
to
GATE output swing).
GND (Pin 3)
Analog Ground. This pin is also the negative sense terminal for the
internal 1.25V reference. Connect external feedback divider
networks that terminate to GND and frequency compensation
components that terminate to GND directly to this pin for best
regulation and performance.
FB (Pin 4) Adjustable Version
This is the inverting input of the error amplifier for the adjustable
voltage AMS 2115. The noninverting input is tied to the internal
1.25V reference. Input bias current for this pin is typically – 3
μ
A
flowing out of the pin. This pin is normally tied to a resistor
divider network to set output voltage. Tie the top of the external
resistor divider directly to the output voltage for best regulation
performance.
OUT (Pin 4) Fixed Output Voltage
This is the input of the error amplifier for the fixed voltage AMS
2115-X. The fixed voltage parts contain a precision resistor
divider network to set output voltage. The typical resistor divider
current is 1 mA into the pin. Tie this pin directly to the output
voltage for best regulation performance.
COMP (Pin 5)
This is the high impedance gain node of the error amplifier and is
used
for
external
frequency
compensation is generally performed with a series RC network to
ground.
GATE (Pin 6)
This is the output of the error amplifier that drives N-channel
MOSFETs with up to 5000pf of “effective” gate capacitance. The
typical open-loop output impedance is 2
. When using low input
capacitance MOSFETs (,1500pF), a small gate resistor of 2
to
10
dampens high frequency ringing created by an LC resonance
that is created by the MOSFET gate’s lead inductance and input
capacitance. The GATE pin delivers up to 50mA for a few
hundred nanoseconds when slewing the gate of the N-channel
MOSFET in response to output load current transients.
INEG (Pin 7)
This is the negative sense terminal of the current limit amplifier. A
small sense resistor is connected in series with the drain of the
external MOSFET and is connected between the IPOS and INEG
pins. A 50mV threshold voltage in conjunction with the sense
resistor value sets the current limit level. The current sense resistor
can be low value shut or can be made from a piece of PC board
trace. If the current limit amplifier is not used tie the INEG and
IPOS to power input voltage. This action disables the current limit
amplifier.
IPOS (Pin 8)
This is the positive sense terminal of the current limit amplifier.
Tie this pin directly to the main power input voltage from which
the output voltage is regulated. This pin is also the input to a
comparator that monitors the power input voltage and keeps the
GATE voltage low until power input voltage is at least 1V. This
prevents the external N Channel MOSFET to turn on before V
power is on thus eliminating possible voltage spikes in the output
voltage when powered up.
compensation.
Frequency