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參數(shù)資料
| 型號： | AmMC002AWP |
| 廠商： | Advanced Micro Devices, Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Aluminum; Series:MS27497; Number of Contacts:6; Connector Shell Size:8; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle |
| 中文描述： | 2，4，或8兆的5.0伏，只有Flash微型卡 |
| 文件頁數(shù)： | 19/39頁 |
| 文件大?。?/td> | 182K |
| 代理商： | AMMC002AWP |
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AmMC0XXA
19
P R E L IM IN A R Y
PROGRAM AND ERASE OPERATIONS
AMD Flash Memory devices include Embedded
Algorithms (Embedded Erase and Embedded Pro-
gram) that allow the host to simply issue a command,
after which it is free to perform other tasks. The host
then only needs to monitor appropriate status bits to
determine when the operation is complete.
Embedded Erase Algorithm
When erasing a sector or device, the Embedded Erase
algorithm does not require the host to first entirely pre-
program the device. Upon executing the Embedded
Erase command sequence, the addressed memory
sector or memory device automatically writes and ver-
ifies the entire memory device or memory sector for an
all “0” data pattern. The system is not required to
provide any controls or timing during these operations.
When the memory sector or memory device is auto-
matically verified to contain an all “0” pattern, a
self-timed chip erase-and-verify begins. The erase and
verify operations are complete when the data on D7
(D15 on the odd byte) of the memory sector or memory
device is “1” (see Write Operation Status section), at
which time the device returns to the read mode. The
system is not required to provide any control or timing
during these operations. If a Reset command is issued
while the erase operation is in progress, the erase
operation will stop, and the data in that device will be
undefined. In that case, restart the erase on that sector
and allow it to complete.
When using the Embedded Erase algorithm, the erase
automatically terminates when adequate erase margin
has been achieved for the memory array (no erase
verify command is required). The margin voltages are
internally generated in the same manner as when the
standard erase verify command is used.
The Embedded Erase command sequence is a
command only operation that stages the memory
sector or memory device for automatic electrical
erasure of all bytes in the array. The automatic erase
begins on the rising edge of the WE# and terminates
when the data on D7 of the memory sector or memory
device is “1” (see Write Operation Status section) at
which time the device returns to the Read mode.
Please note that for the memory device or memory
sector erase operation, Data Polling may be performed
at any address in that device or sector.
Figure 4 and Table 13 illustrate the Embedded Erase
Algorithm, a typical command string and bus operations.
As described earlier, once the memory sector in a
device or memory device completes the Embedded
Erase operation, it returns to the Read mode and
addresses are no longer latched. Therefore, the device
requires that a valid address input to the device is
supplied by the system at this particular instant of time.
Otherwise, the system will never read a “1” on D7. A
system designer has the following choices to
implement the Embedded Erase algorithm:
1. The host may keep the sector address (within any
of the sectors being erased) valid during the entire
Embedded Erase operation.
2. Once the system executes the Embedded Erase
command sequence, the host may remove the ad-
dress from the device and perform other tasks. The
host is required to keep track of the valid sector ad-
dress by loading it into a temporary register. When
the host comes back to Data Poll the device, it must
reassert the same address.
3. The host may monitor BUSY# (RY/BY#) to deter-
mine the status of the Embedded Algorithm in
progress. A “0” indicates that the device is busy; a
“1” indicates that the algorithm is complete.
Sector Erase
Sector erase is a six bus cycle operation. There are
two “unlock” write cycles. These are followed by
writing the “set-up” command. Two more “unlock”
write cycles are then followed by the sector erase
command. The sector address (any address location
within the desired sector) is latched on the falling edge
of
WE#
(or CE#), whichever occurs later, while the
command (data) is latched on the rising edge of the
WE# (or CE#) pulse, whichever occurs first. A
time-out of 100
μ
s from the rising edge of the last
sector erase command will initiate the sector erase
command(s)
Multiple sectors may be queued for concurrent erase
by writing the six bus cycle operations as described
above. This sequence is followed with writes of the
sector erase command 30h to addresses in other
sectors desired to be concurrently erased. A time-out
of 100
μ
s from the rising edge of the WE# (or CE#)
pulse for the last sector erase command will initiate the
sector erase. If another sector erase command is
written within the 100
μ
s time-out window the timer is
reset. Any command other than sector erase within the
time-out window will reset the device to the read mode,
ignoring the previous command string (refer to Write
Operation Status section for Sector Erase Timer oper-
ation). Loading the sector erase buffer may be done in
any sequence and with anysector number.
Sector erase does not require the user to program the
device prior to erase. The device automatically pro-
grams all memory locations in the sector(s) to be
erased prior to electrical erase. When erasing a sector
or sectors, the remaining unselected sectors are not
affected. The system is not required to provide any
controls or timings during these operations. A Reset
command issued after the device has begun execution
stops the erase operation, but the data in the sector will
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AmMC004AWP | Circular Connector; No. of Contacts:6; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:8; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:8-35 RoHS Compliant: No |
| AmMC008AWP | Circular Connector; No. of Contacts:6; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:8; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:8-35 RoHS Compliant: No |
| AmMCL002AWP | Circular Connector; No. of Contacts:6; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:8; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:8-6 RoHS Compliant: No |
| AmMCL004AWP | Circular Connector; No. of Contacts:3; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:8; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:8-98 RoHS Compliant: No |
| AMMCL00XA | JT 3C 3#20 SKT RECP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AMMC004ANP-150 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM Module |
| AMMC004AWP | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:2, 4, or 8 Megabyte 5.0 Volt-only Flash Miniature Card |
| AMMC008ANP-150 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM Module |
| AMMC008AWP | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:2, 4, or 8 Megabyte 5.0 Volt-only Flash Miniature Card |
| AMMC0XXA | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:2, 4, or 8 Megabyte 5.0 Volt-only Flash Miniature Card |
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