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參數(shù)資料
| 型號： | AMIS42665TJAA1G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | TRANSCEIVER CAN HS LP 8-SOIC |
| 標準包裝： | 96 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | CAN |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設(shè)備封裝： | 8-SOICN |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1115 (CN2011-ZH PDF) |
| 其它名稱： | 766-1018 |
AMIS42665
http://onsemi.com
5
detected by the lowpower differential receiver, the signal
is first filtered and then verified as a valid wake signal after
a time period of tdbus, the RxD pin is driven low by the
transceiver to inform the controller of the wakeup request.
Split Circuit
The VSPLIT Pin is operational only in normal mode. In
standby mode this pin is floating. The VSPLIT is connected
as shown in Figure 2 and its purpose is to provide a stabilized
DC voltage of 0.5 x VCC to the bus avoiding possible steps
in the commonmode signal therefore reducing EME. These
unwanted steps could be caused by an unpowered node on
the network with excessive leakage current from the bus that
shifts the recessive voltage from its nominal 0.5 x VCC
voltage.
Wakeup
When a valid wakeup (dominant state longer than tdbus)
is received during the standby mode the RxD pin is driven
low. Wakeup behavior in case of a permanent dominant –
due to, for example, a bus short – represents the only
difference between the circuit subversions listed in the
When the standby mode is entered while a dominant is
present on the bus, the “unconditioned bus wakeup”
versions will signal a buswakeup immediately after the
state transition (seen as a Highlevel glitch on RxD). The
other version (differing purely by a metallevel
modification in the digital part) will signal buswakeup only
after the initial dominant is released. In this way it’s ensured,
that a CAN bus can be put to a lowpower mode even if the
nodes have a level sensitivity to RxD pin and a permanent
dominant is present on the bus.
Overtemperature Detection
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 160
°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC are reduced. All other
IC functions continue to operate. The transmitter offstate
resets when Pin TxD goes high. The thermal protection
circuit is particularly needed when a bus line short circuits.
TxD Dominant Timeout Function
A TxD dominant timeout timer circuit prevents the bus
lines being driven to a permanent dominant state (blocking
all network communication) if Pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the lowlevel on Pin TxD exceeds the
internal timer value tdom(TxD), the transmitter is disabled,
driving the bus into a recessive state. The timer is reset by a
positive edge on Pin TxD. See Figure 10.
This TxD dominant timeout time (tdom(TxD)) defines the
minimum possible bit rate to 40 kbps.
Fail Safe Features
A currentlimiting circuit protects the transmitter output
stage from damage caused by accidental short circuit to
either positive or negative supply voltage, although power
dissipation increases during this fault condition.
The pins CANH and CANL are protected from
automotive electrical transients (according to ISO 7637; see
Figure 5). Pins TxD and STB are pulled high internally
should the input become disconnected. Pins TxD, STB and
RxD will be floating, preventing reverse supply should the
VCC supply be removed.
CANH
CANL
STB
RxD
Normal
Standby*
unconditioned WU
Figure 3. AMIS42665TJAA1/3 Wakeup Behavior
time
tdbus
*Even if bus dominant signals longer than tdbus are echoed on RxD, the transceiver
stays in standby mode until STB is released.
Figure 4. AMIS42665TJAA6 Wakeup Behavior
CANH
CANL
STB
RxD
Normal
Standby*
time
*On this derivative, bus dominant signals longer than tdbus are echoed on RxD after the bus passed through
a recessive time following the trigger of STB. The transceiver stays in standby mode until STB is released.
tdbus
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AMIS42665TJAA1RG | 功能描述:CAN 接口集成電路 HS LP CAN TRANSC. RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube |
| AMIS42665TJAA3L | 功能描述:通信集成電路 - 若干 HS LP CAN TRANSC. NIPDAU RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| AMIS42665TJAA3RL | 功能描述:通信集成電路 - 若干 HS LP CAN TRANSC. NIPDAU RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| AMIS42665TJAA6G | 功能描述:CAN 接口集成電路 HS LP CAN TRANSC PLUS WAKEUP RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube |
| AMIS42665TJAA6L | 功能描述:CAN 接口集成電路 HS LP CAN TRANSC NIPDAU RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube |
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