
AMIS-40615
LIN Transceiver with 3.3V Voltage Regulator
Data Sheet
Table 7: DC Characteristics LIN Transmitter
Symbol
Pin LIN
VLin_dom_LoSup
VLin_dom_HiSup
VLin_rec
ILIN_lim
Rslave
ILIN_off_dom
ILIN_off_rec
ILIN_no_GND
ILIN_no_Vbb
Note:
1.
Table 8: DC Characteristics LIN Receiver
Symbol
Pin LIN
Vrec_dom
Vrec_rec
Vrec_cnt
Vrec_hys
Table 9: DC Characteristics I/Os
Symbol
Pin WAKE
V_wake_th
I_leak
T_wake_min
Pins TxD and STB
Vil
Vih
Rpu
Pin INH
Delta_VH
I_leak
Pin EN
Vil
Vih
Rpd
Pin RxD
Vol
Voh
Note:
1.
By one of the trimming bits, following reconfiguration can be done during chip-level testing in order to fit the AMIS-40615 into different interface: pins TxD and EN
will have typ. 10k
pull-down resistor to ground and pin WAKE will have typ. 10μA pull-up current source.
Table 10: DC Characteristics
Symbol
Parameter
POR
PORH_Vbb
POR high level V
bb
comparator
PORL_Vbb
POR low level V
bb
comparator
POR_Vbb_hyst
Hysteresis of POR level V
bb
comparator
POR_Vbb_sl
Maximum slope on V
bb
to guarantee POR
PORH_Vcc
POR high level V
cc
comparator
PORL_Vcc
POR low level V
cc
comparator
POR_Vcc_hyst
Hysteresis of POR level V
cc
comparator
TSD
Tj
Junction temperature
For shutdown
Tj_hyst
Thermal shutdown hysteresis
Parameter
Conditions
Min.
Typ.
33
Max.
1.2
2.0
130
47
20
1
100
Unit
V
V
V
mA
k
mA
μ
A
mA
μ
A
LIN dominant output voltage
LIN dominant output voltage
LIN recessive output voltage
Short circuit current limitation
Internal pull-up resistance
LIN output current bus in dominant state
LIN output current bus in recessive state
Communication not affected
LIN bus remains operational
TXD = low; V
bb
= 7.3V
TXD = low; V
bb
= 18V
TXD = high; Ilin = 0mA
VLin = Vbb_max
Driver off; V
bb
= 12V
Driver off; V
bb
= 12V
Vbb = GND = 12V; 0 < VLin < 18V
Vbb = GND = 0V; 0 < VLin < 18V
V
bb
- V
γ
(1)
40
20
-1
-1
V
γ
is the forward diode voltage. Typically (over the complete temperature) V
γ
= 1V.
Parameter
Conditions
Min.
0.4
0.4
0.475
0.05
Typ.
Max.
0.6
0.6
0.525
0.175
Unit
V
bb
V
bb
V
bb
V
bb
Receiver threshold
Receiver threshold
Receiver center voltage
Receiver hysteresis
LIN bus recessive
→
dominant
LIN bus dominant
→
recessive
(Vbus_dom + Vbus_rec) / 2
Parameter
Conditions
Min.
0.35
-1
8
2.0
50
Typ.
-0.5
0.35
Max.
0.65
1
54
0.8
200
0.75
1
0.8
200
0.65
Unit
V
bb
μ
A
μ
s
V
V
k
V
μ
A
V
V
k
V
V
Threshold voltage
Input leakage current
(1)
Debounce time
Vwake = 0V; V
bb
= 18V
Sleep mode; rising and falling edge
Low level input voltage
High level input voltage
Pull-up resistance to Vcc
(1)
High level voltage drop
Leakage current
IINH = 15mA
Sleep mode; VINH = 0V
-1
2.0
50
Low level input voltage
High level input voltage
Pull-down resistance to ground
(1)
Low level output voltage
High level output voltage
Isink = 2mA
Isource = -2mA
V
cc
- 0.65V
Conditions
Min.
3
100
2
100
165
9
Typ.
Max.
4.5
50
3
195
18
Unit
V
V
mV
V/ms
V
V
mV
°C
°C
10
AMI Semiconductor
– March 2007, M-20544-001
www.amis.com