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  • 參數(shù)資料
    型號: AME8501BEEVDF20
    廠商: AME, Inc.
    英文描述: UProcessor Supervisory
    中文描述: UProcessor監(jiān)督
    文件頁數(shù): 2/14頁
    文件大小: 410K
    代理商: AME8501BEEVDF20
    AME, Inc.
    2
    μ
    Processor Supervisory
    AME8500 / 8501
    n
    Block Diagram (contd.)
    AME8500AEET
    AME8501AEET
    1. GND
    2. Reset/ResetB
    3. V
    DD
    SOT-23
    Top View
    1
    2
    3
    AME8500
    n
    Pin Configuration
    SOT-23
    Top View
    1
    2
    3
    AME8500
    SOT-23
    Top View
    AME8500CEET
    AME8501CEET
    1. Reset/ResetB
    2. V
    DD
    3. GND
    1
    2
    3
    AME8500
    AME8500BEET
    AME8501BEET
    1. Reset/ResetB
    2. GND
    3. V
    DD
    AME8500 with Open-Drain RESET
    Delay
    V
    DD
    GND
    R1
    R2
    I1
    V
    REF
    N1
    RESET
    AME8500 with Open-Drain RESET
    RESET
    Delay
    V
    DD
    GND
    R1
    R2
    I1
    V
    REF
    N1
    AME8500AEET
    AME8501AEET
    1. GND
    2. Reset/ResetB
    3. V
    DD
    SOT-23-L
    Top View
    1
    2
    3
    AME8500
    相關PDF資料
    PDF描述
    AME8500AEETAD19 Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125
    AME8500AEETAD21 Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125
    AME8500AEETAD22 Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125
    AME8500AEETAD23 Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125
    AME8500AEETAD24 UProcessor Supervisory
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