參數(shù)資料
型號(hào)： AM79Q063VC
英文描述： 15NS, SOIC, IND TEMP(EPLD)
中文描述： 通信集成電路
文件頁(yè)數(shù)： 9/100頁(yè)
文件大?。?/td> 1870K
代理商： AM79Q063VC
SLAC Products
9
PIN DESCRIPTIONS
CD1
1
–
CD1
4
,
CD2
1
–
CD2
4
Inputs/
Outputs
Control and Data. CD1 and CD2 are TTL compatible programmable Input or Output (I/O) ports.
They can be used to monitor or control the state of SLIC or any other device associated with sub-
scriber line interface. The direction, input or output, is programmed using MPI Command 22 or GCI
Monitor channel Command 8. As outputs, CD1 and CD2 can be used to control relays, illuminate
LEDs, or perform any other function requiring a latched TTL compatible signal for control. In PCM/
MPI mode, the output state of CD1 and CD2 is written using MPI Command 20. In GCI mode, the
output state of CD1 and CD2 is determined by the C1 and C2 bits contained in the down stream
C/I channel for the respective channel. As inputs, CD1 and CD2 can be processed by the QSLAC
device (if programmed to do so). CD1 can be debounced before it is made available to the system.
The debounce time is programmable from 0 to 15 ms in 1 ms increments using MPI Command 45
and GCI monitor channel Command 11. CD2 can be filtered using the up/down counter facility and
programming the sampling interval using MPI Command 52 or GCI SOP Command 12.
Additionally, CD1 can be demultiplexed into two separate inputs using the E1 demultiplexing
function. The E1 demultiplexing function of the QSLAC device was designed to interface directly
to Legerity SLICS supporting the ground key function. With the proper Legerity SLIC and the E1
function of the QSLAC enabled, the CD1 bit can be demultiplexed into an Off-Hook/Ring Trip sig-
nal and Ground Key signal. In the demultiplex mode, the second bit, Ground Key, takes the place
of the CD2 as an input. The demultiplexed bits can be debounced (CD1) or filtered (CD2) as ex-
plained previously. A more complete description of CD1, CD2, debouncing, and filtering functions
is contained in the
Operating the QSLAC Device
section on page 32.
Once the CD1 and CD2 inputs are processed (Debounced, Filtered and/or Demultiplexed) by the
QSLAC device, the information can be accessed by the system in two ways in the PCM/MPI
mode: 1) on a per channel basis along with C3, C4, and C5 of the specific channel using MPI
Command 21, or 2) by using MPI Commands 16 and 17, which obtain the CD1 and CD2 bits from
all four channels simultaneously. This feature reduces the processor overhead and the time re-
quired to retrieve time-critical signals from the line circuits, such as off-hook and ring trip. With this
feature, hookswitch status and ring trip information, for example, can be obtained from all four
channels of a QSLAC device with one read command. In the GCI mode, the processed CD1 and
CD2 inputs are transmitted upstream on the CD1 and CD2 bits for the respective analog channel,
1 or 2, using the C/I channel.
C3
1
–
C3
4
,
C4
1
–
C4
4
,
C5
1
–
C5
4
Inputs/
Outputs
Control. C3, C4, and C5 are TTL-compatible programmable Input or Output (I/O) ports. They can
be used to monitor or control the state of SLIC or any other device associated with subscriber line
interface. The direction, input or output, is programmed using MPI Command 22 or GCI Monitor
channel Command 8. As outputs, C3, C4, and C5 can be used to control relays, illuminate LEDs,
or perform any other function requiring a latched TTL compatible signal for control. In PCM/MPI
mode, the output state of C3, C4, and C5 is written using MPI Command 20. In GCI mode, the
output state of C3, C4, and C5 is determined by the C3, C4, and C5 bits contained in the down
stream C/I channel for the respective analog channel. As inputs, C3, C4, and C5 can be accessed
by the system in PCM/MPI mode by using MPI Command 21. In GCI mode, C3 is transmitted up-
stream, along with CD1 and CD2, for the respective analog channel using C3 of the C/I channel.
Also, in GCI mode, C3, C4, and C5 can be read along with CD1 and CD2 using Monitor channel
Command 10.
The Am79Q061 QSLAC device contains a single PCM highway or GCI Interface and five pro-
grammable I/Os per channel (CD1, CD2, C3, C4, and C5) in a 44-pin PLCC or TQFP package.
C6
1
–
C6
4
,
C7
1
–
C7
4
Outputs
Control. Two additional outputs per channel are available on the Am79Q063VC device.
CHCLK
Output
Chopper Clock. This output provides a 256 kHz or a 292.57 kHz, 50% duty cycle, TTL-compatible
clock for use by up to four SLICs with built-in switching regulators. The CHCLK frequency is syn-
chronous to MCLK/DCL (MCLK in PCM mode, DCL in GCI mode), but the phase relationship to
MCLK/DCL is random. The chopper clock is not available in all package types.
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