Am79C901A
21
P R E L I M I N A R Y
TMS
Test Mode Select
A serial input bit stream on the TMS pin is used to de-
fine the specific boundary scan test to be executed.
The pin has an internal pull-up resistor.
Ethernet Network Interfaces
TX±
Serial Transmit Data
These pins carry the transmit output data and are con-
nected to the transmit side of the magnetics module.
RX±
Serial Receive Data
These pins accept the receive input data from the
magnetics module.
IREF
Internal Current Reference
This pin serves as a current reference for the integrated
1/10 PHY. It must be connected to GND through a
12.1 k
resistor (1%).
HomePNA PHY Network Interface
HRTXRXP/HRTXRXN
Serial Receive Data
These pins accept the receive input data from the mag-
netics module and carry the transmit output data. A
102-
resistor should be placed between these pins.
Clock Interface
XCLK/XTAL
External Clock/Crystal Select
When HIGH, an external 60-MHz clock source is se-
lected bypassing the crystal circuit and clock trippler.
When LOW, a 20-MHz crystal is used instead. Table 1
illustrates how this pin works.
Input
Output
Input
Input
Input/Output
Input
Table 1.
Clock Source Selection
XTAL1
Crystal Oscillator In
The internal clock generator utilizes either a 20-MHz
crystal that is attached to pins XTAL1 and XTAL2 or a
60-MHz clock source connected to XTAL1. This pin is
not 5 V tolerant, and the 60 MHz clock source should
be from a 3.3 V source.
XTAL2
Crystal Oscillator Out
The internal clock generator utilizes a 20-MHz crystal
that is attached to pins XTAL1 and XTAL2. In XCLK
mode, this pin should be left unconnected.
Power Supply
DVDD
Digital Power (5 Pins)
These pins are the power supply pins that are used to
provide power to the digital portions of the design. All
DVDD pins must be connected to a +3.3 V supply.
AVDD
Analog Power (7 Pins)
These pins are the power supply pins that are used to
provide power to the analog portions of the design. All
AVDD pins must be connected to a +3.3 V supply.
DVSS
Digital Ground (6 Pins)
These pins are the ground connections for the digital
portions of the design.
AVSS
Analog Ground (4 Pins)
These pins are the ground connections for the analog
portion of the design.
Scan Test Interface
TEN
Test Enable
The test enable pin is for factory use only. It must be
connected to V
SS
for normal operation.
Input
Output
+3.3 V Power
+3.3 V Power
Ground
Ground
Input
Input Pin
Output
Pin
XCLK/XTAL
Clock Source
XTAL1
XTAL2
0
20-MHz Crystal
XTAL1
NC
1
60-MHz Oscillator/
External CLK
Source