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參數(shù)資料
| 型號(hào)： | AM79C864A |
| 英文描述： | 208 PQFP, IND TEMP(FPGA) |
| 中文描述： | Am79C864A -物理層加擾控制器（PLC - S）的 |
| 文件頁數(shù)： | 2/51頁 |
| 文件大小： | 248K |
| 代理商： | AM79C864A |
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AMD
P R E L I M I N A R Y
3-4
The SUPERNET 2 Family for FDDI 1994 Data Book
PLC-S chip during Link Confidence Test and after the
link has been formed, to detect a noisy link. The PLC-S
contains a Line State Machine for detecting received
line states and a Data Stream Generator for transmitting
the various line states. The PLC-S also contains a state
machine called Physical Connection Insertion (PCI)
which is used in Physical Connection insertion and re-
moval. It performs the necessary ring scrubbing and
data path switching.
The Node Processor Interface in the PLC-S consists of
several control and status registers. The PLC-S also
contains error and special event counters, Built In Self
Test (BIST) logic, Boundary Scan logic, and several
data loopback multiplexers so that internal data paths
may be reconfigured for test purposes.
PLC-S BLOCK DIAGRAM
PLC-S
Core
Stream
Cipher
Scrambler
Stream
Cipher
Descrambler
TX 9–0
TXPAR
NPADDR 4-0
NP 15-0
RX 9–0
RXPAR
TDAT 4–0
Control
Signals
RDAT 4–0
RSCLK
SCRM
Programmable
FOTOFF Control
FOTOFF
SDO
See next page for the PLC-S Core block diagram
(Optional)
Signal_Detect Control
15535B-1
LSCLK
ITDAT
IRDAT
CIPHER_
LOOPBACK
MUX
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| AM79C864AKC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Physical Layer Controller With Scrambler (PLC-S) |
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| AM79C870KC/W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Transceiver |
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