
Philips Semiconductors Linear Products
Product specification
AM6012
12-Bit multiplying D/A converter
August 31, 1994
781
testing and application. The logic switch design enables propagation
delays of only 25ns for each of the 12 bits. Settling time to within
LSB of the LSB is therefore 25ns, with each progressively larger bit
taking successively longer. The MSB settles in 250ns, thus
determining the overall settling time of 250ns. Settling to 10-bit
accuracy requires about 90 to 130ns. The output capacitance of the
AM6012 including the package is approximately 20pF; therefore, the
output RC time constant dominates settling time if R
L
>500
.
Settling time and propagation delay are relatively insensitive to logic
input amplitude and rise and fall times, due to the high gain of the
logic switches. Settling time also remains essentially constant for
I
REF
values down to 0.5mA, with gradual increases for lower I
REF
values lies in the ability to attain a given output level with lower load
resistors, thus reducing the output RC time constant.
Measurement of settling time requires the ability to accurately
resolve
±
2
μ
A, therefore a 2.5k
load is needed to provide adequate
drive for most oscilloscopes. At I
REF
values of less than 0.5mA,
excessive RC damping of the output is difficult to prevent while
maintaining adequate sensitivity. However, the major carry from
011111111111 to 100000000000 provides an accurate indicator of
settling time. This code change does not require the normal 6.2 time
constants to settle to within
±
0.1% of the final value, and thus
settling times may be observed at lower values of I
REF
.
AM6012 switching transients or “glitches” are very low and may be
further reduced by small capacitive loads at the output at a minor
sacrifice in settling time.
Fastest operation can be obtained by using short leads, minimizing
output capacitance and load resistor values, and by adequate
bypassing at the supply, reference, and V
LC
terminals. Supplies do
not require large electrolytic bypass capacitors as the supply current
drain is independent of input logic states; 0.1
μ
F capacitors at the
supply pins provide full transient protection.
APPLICATIONS INFORMATION
Reference Amplifier Setup
The AM6012 is a multiplying D/A converter in which the output
current is the product of a digital number and the input reference
current. The reference current may be fixed or may vary from nearly
zero to +1.0mA. The full range output current is a linear function of
the reference current and is given by:
I
FR
4095
4096
x 4 x (I
REF
)
3.999 I
REF
where I
REF
= I
14
In positive reference applications, an external positive reference
voltage forces current through R
14
into the V
REF(+)
terminal (Pin 14)
of the reference amplifier. Alternatively, a negative reference may be
applied to V
REF(-)
at Pin 15. Reference current flows from ground
through R
14
into V
REF(+)
as in the positive reference case. This
negative reference connection has the advantage of a very high
impedance presented at Pin 15. The voltage at Pin 14 is equal to
and tracks the voltage at Pin 15 due to the high gain of the internal
reference amplifier. R
15
(nominally equal to R
14
) is used to cancel
bias current errors (Figure 2a).
Bipolar references may be accommodated by offsetting V
REF
or Pin
15. The negative common-mode range of the reference amplifier is
given by: V
CM-
=V- plus (I
REF
×
3k
) plus 1.8V. The positive
common-mode range is V+ less 1.23V.
When a DC reference is used, a reference bypass capacitor is
recommended. A 5.0V TTL logic supply is not recommended as a
reference. If a regulated power supply is used as a reference, R
14
should be split into two resistors with the junction bypassed to
ground with a 0.1
μ
F capacitor.
For most applications, the tight relationship between I
REF
and I
FS
will eliminate the need for trimming I
REF
. If required, full-scale
trimming may be accomplished by adjusting the value of R
14
, or by
using a potentiometer for R
14
.
MULTIPLYING OPERATION
The AM6012 provides excellent multiplying performance with an
extremely linear relationship between I
FS
and I
REF
over a range of
1mA to 1
μ
A. Monotonic operation is maintained over a typical range
of I
REF
from 100
μ
A to 1.0mA.
REFERENCE AMPLIFIER COMPENSATION FOR
MULTIPLYING APPLICATIONS
reference applications will require the reference amplifier to be
compensated using a capacitor from pin 16 to V-. The value of this
capacitor depends on the impedance presented to Pin 14. For R14
values of 1.0, 2.5 and 5.0k
, minimum values of C
C
are 5, 12 and
25pF. Larger values of R14 require proportionately increased values
of CC for proper phase margin (see Figure 2b).
For fastest response to a pulse, low values of R
14
enabling small C
C
values should be used. If Pin 14 is driven by a high impedance such
as a transistor current source, none of the above values will suffice
and the amplifier must be heavily compensated which will decrease
overall bandwidth and slew rate. For R
14
=1k
and C
C
=5pF, the
reference amplifier slews at 4mA/ms enabling a transition from
I
REF
=0 to I
REF
=1mA in 250ns.
Operation with pulse inputs to the reference amplifier may be
accommodated by an alternate compensation scheme. This
technique provides lowest full-scale transition times. An internal
clamp allows quick recovery of the reference amplifier from a cutoff
(I
REF
=0) condition. Full-scale transition (0 to 1mA) occurs in 62.5ns
when the equivalent impedance at Pin 14 is 800
and C
C
=0. This
yields a reference slew rate of 8mA/
μ
s which is relatively
independent of R
IN
and V
IN
values.
LOGIC INPUTS
The AM6012 design incorporates a unique logic input circuit which
enables direct interface to all popular logic families and provides
maximum noise immunity. This feature is made possible by the large
input swing capability, 40
μ
A logic input current, and completely
adjustable logic threshold voltage. For V-=-15V, the logic inputs may
swing between -5 and +10V. This enables direct interface with +15V
CMOS logic, even when the AM6012 is powered from a +5V supply.
Minimum input logic swing and minimum logic threshold voltage are
given by:
V- plus (I
REF
×
3k
) plus 1.8V.
The logic threshold may be adjusted over a wide range by placing
an appropriate voltage at the logic threshold control pin (Pin 13,
V
LC
). For TTL interface, simply ground Pin 13. When interfacing
ECL, an I
REF
≤
1mA is recommended. For general setup of the logic
control circuit, it should be noted that Pin 13 will sink 1.1mA typical.
External circuitry should be designed to accommodate this current
(Figure 3).