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| 型號： | Am53CF94JCW |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Enhanced SCSI-2 Controller (ESC) |
| 中文描述： | 增強型SCSI - 2控制器（調(diào)速器） |
| 文件頁數(shù)： | 16/76頁 |
| 文件大小： | 735K |
| 代理商： | AM53CF94JCW |
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P R E L I M I N A R Y
AMD
16
Am53CF94/Am53CF96
RSTC
Reset Control
(Output, Active Low, Open Drain)
This is a SCSI output with 48 mA drive. The Reset SCSI
command will cause the device to drive
RSTC
active for
25 ms–40 ms, which will depend on the CLK frequency
and the conversion factor. When the device is config-
ured in the Single Ended SCSI Mode (
DFMODE
inac-
tive) this pin is defined as a
RST
output for the SCSI bus.
When the device is configured in the Differential SCSI
Mode (
DFMODE
active) this pin is defined as the direc-
tion control for the external differential transceiver. In
this mode, a signal high state corresponds to an output
to the SCSI bus and a low state corresponds to an input
from the SCSI bus.
REQC
Request Control
(Output, Active Low, Open Drain)
This is a SCSI output with 48 mA drive. This signal is
activated only in the Target mode.
ACKC
Acknowledge Control
(Output, Active Low, Open Drain)
This is a SCSI output with 48 mA drive. This signal is ac-
tivated only in the Initiator mode.
ISEL
Initiator Select
(Output, Active High)
This signal is available on the Am53CF96 only. This sig-
nal is active whenever the device is in the Initiator mode.
In the differential mode this signal is used to enable the
Initiator signals
ACKC
and
ATN
and the device also
drives these signals.
TSEL
Target Select
(Output, Active High)
This signal is available on the Am53CF96 only. This sig-
nal is active whenever the device is in the Target mode.
In the differential mode this signal is used to enable the
Target signals
REQC
,
MSG
,
C/D
and
I/O
and the device
also drives these signals.
FUNCTIONAL DESCRIPTION
Register Map
Address
(Hex.) Operation
Register
00
Read
Current Transfer Count
Register Low
Start Transfer Count Register
Low
Current Transfer Count
Register Middle
Start Transfer Count Register
Middle
FIFO Register
Command Register
Status Register
SCSI Destination ID Register
Interrupt Status Register
SCSI Timeout Register
Internal State Register
Synchronous Transfer Period
Register
00
Write
01
Read
01
Write
02
03
04
04
05
05
06
06
Read/Write
Read/Write
Read
Write
Read
Write
Read
Write
Address
(Hex.)
Operation
Register
07
Read
Current FIFO/Internal State
Register
Synchronous Offset Register
Control Register 1
Clock Factor Register
Forced Test Mode Register
Control Register 2
Control Register 3
Control Register 4
Current Transfer Count
Register High
Start Transfer Count
Register High
Data Alignment Register
07
08
09
0A
0B
0C
0D
0E
Write
Read/Write
Write
Write
Read/Write
Read/Write
Read/Write
Read
0E
Write
0F
Write
Note:
Not all registers in this device are both readable and writable. Some read only registers share the same address with write only
registers. The registers can be accessed by asserting the
CS
signal and then asserting either
RD
or
WR
signal depending on the
operation to be performed. Only the FIFO Register can be accessed by asserting either
CS
or
DACK
n conjunction with
RD
and
WR
signals or
DMARD
and
DMAWR
signals. The register address inputs are ignored when
DACK
is used but must be valid
when
CS
is used.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Am53CF94KC | Enhanced SCSI-2 Controller (ESC) |
| Am53CF94KCW | Enhanced SCSI-2 Controller (ESC) |
| Am53CF96 | Enhanced SCSI-2 Controller (ESC) |
| Am53CF96JC | Enhanced SCSI-2 Controller (ESC) |
| Am53CF96JCW | Enhanced SCSI-2 Controller (ESC) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM53CF94KC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Enhanced SCSI-2 Controller (ESC) |
| AM53CF94KCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Enhanced SCSI-2 Controller (ESC) |
| AM53CF96 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Enhanced SCSI-2 Controller (ESC) |
| AM53CF96JC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Enhanced SCSI-2 Controller (ESC) |
| AM53CF96JCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Enhanced SCSI-2 Controller (ESC) |
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