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參數(shù)資料
| 型號： | AM512BVC |
| 廠商： | RENISHAW PLC |
| 元件分類： | 磁阻傳感器 |
| 英文描述： | MAGNETIC FIELD SENSOR-HALL EFFECT, 1-4 V, SQUARE, SURFACE MOUNT |
| 封裝： | ROHS COMPLIANT, LQFP-44 |
| 文件頁數(shù)： | 20/22頁 |
| 文件大?。?/td> | 608K |
| 代理商： | AM512BVC |
Data sheet
AM512BD01_04
Issue 4, 14
th January 2009
2009 RLS d.o.o.
A
associate company
7
Binary synchronous serial output SSI
Serial output data is available in 9 bit natural binary code through the SSI protocol. Pin PS must be set high
to activate the serial output mode.
By default, with CW rotation of the magnet the value of output data is increasing. It is possible to order an
AM512B version with position increasing with CCW rotation of the magnet (special order).
Parameter
Symbol
Min.
Max.
Unit
Clock period
tCL
1.2
16
s
Clock high
tCHI
0.6
15.6
s
Clock low
tCLO
0.6
15.6
s
Monoflop time
tm
16
22
s
CL
t
CHI
t
CLO
1
2
3
t
m
4
D8
D7
D6
D5
D3
D4
D2
D0
Clock
Data
D1
Fig. 5: SSI timing diagram
The controller interrogates the AM512B for its positional value by sending a pulse train to the Clock input.
The Clock signal must always start from high. The first high/low transition (point 1) stores the current
position data in a parallel/serial converter and the monoflop is triggered. With each transition of Clock signal
(high/low or low/high) the monoflop is retriggered. At the first low/high transition (point 2) the most significant
bit (MSB) of binary code is transmitted through the Data pin to the controller. At each subsequent low/high
transition of Clock the next bit is transmitted to the controller. While reading the data the tCHI and tCLO must
be less than tmMin to keep the monoflop set. After the least significant bit (LSB) is output (point 3) the Data
goes to low. The controller must wait longer than tmMax before it can read updated position data. At this point
the monoflop time expires and the Data output goes to high (point 4).
It is possible to read the same position data several times to enlarge the reliability of transmitted data. The
controller must continue sending the Clock pulses and the same data will be output again. Between the two
outputs one logic zero will be output.
Clock
Data
D7 D6 D5 D4 D3 D2 D1 D0
D8
Fig. 6: SSI multi-read of the same position data
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