參數(shù)資料
型號: AM49PDL127BH
廠商: Spansion Inc.
英文描述: 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS
中文描述: 128兆位(8米× 16位),3.0伏的CMOS只,同時作業(yè)閃存和32兆位(2米× 16位)的CMOS
文件頁數(shù): 84/86頁
文件大?。?/td> 588K
代理商: AM49PDL127BH
82
Am49PDL127BH/Am49PDL129BH
December 16, 2003
A D V A N C E I N F O R M A T I O N
pSRAM ADDRESS SKEW
Figure 34.
Read Address Skew
Note:
If multiple invalid address cycles shorter than t
RC
min occur for a period greater than 10 μs, at least one valid address
cycle over t
RC min
is required during that period.
Figure 35.
Write Address Skew
Note:
If multiple invalid address cycles shorter than t
WC
min occur for a period greater than 10 μs, at least one valid address
cycle over t
WC min
, in addition to t
WP min
, is required during that period.
CE#1ps
WE#
Address
t
RC min
over 10
μ
s
CE#1ps
WE#
Address
t
WP min
t
WC min
over 10
μ
s
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AM49PDL127BH66IS 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS
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