參數(shù)資料
型號： AM42DL1642DB70IS
廠商： ADVANCED MICRO DEVICES INC
元件分類： 存儲器
英文描述： Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA69
封裝： 8 X 11 MM, FBGA-69
文件頁數(shù)： 127/128頁
文件大小： 650K
代理商： AM42DL1642DB70IS
1
February 6, 2004
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
MCP Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . 5
Flash Memory Block Diagram. . . . . . . . . . . . . . . . 6
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . .7
Special Handling Instructions for FBGA Package ....................7
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Device Bus Operations—Flash Word Mode (CIOf = V
IH
),
SRAM Word Mode (CIOs = V
CC
) ....................................................11
Table 2. Device Bus Operations—Flash Byte Mode (CIOf = V
SS
),
SRAM Word Mode (CIOs = V
CC
) ....................................................12
Word/Byte Configuration ....................................................... 13
Requirements for Reading Array Data ...................................13
Writing Commands/Command Sequences ............................13
Accelerated Program Operation ..........................................13
Autoselect Functions ...........................................................13
Simultaneous Read/Write Operations with Zero Latency .......13
Standby Mode ........................................................................ 14
Automatic Sleep Mode ...........................................................14
RESET#: Hardware Reset Pin ...............................................14
Output Disable Mode ..............................................................14
Table 3. Device Bank Division ........................................................14
Table 4. Sector Addresses for Top Boot Sector Devices ............... 15
Table 5. SecSi Sector Addresses for Top Boot Devices ................15
Table 6. Sector Addresses for Bottom Boot Sector Devices ...........16
Table 7. SecSi
Addresses for Bottom Boot Devices ..................16
Autoselect Mode ..................................................................... 17
Sector/Sector Block Protection and Unprotection .................. 17
Table 8. Top Boot Sector/Sector Block Addresses for Protection/Un-
protection ........................................................................................17
Table 9. Bottom Boot Sector/Sector Block Addresses
for Protection/Unprotection .............................................................17
Write Protect (WP#) ................................................................18
Temporary Sector/Sector Block Unprotect .............................18
Figure 1. Temporary Sector Unprotect Operation........................... 18
Figure 2. In-System Sector/Sector Block Protect and Unprotect Algo-
rithms .............................................................................................. 19
SecSi (Secured Silicon) Sector Flash Memory Region ..........20
Factory Locked: SecSi Sector Programmed and Protected At
the Factory ..........................................................................20
Customer Lockable: SecSi Sector NOT Programmed or Pro-
tected At the Factory ...........................................................20
Hardware Data Protection ......................................................20
Low V
CC
Write Inhibit ...........................................................20
Write Pulse “Glitch” Protection ............................................21
Logical Inhibit ......................................................................21
Power-Up Write Inhibit .........................................................21
Common Flash Memory Interface (CFI) . . . . . . .21
Table 10. CFI Query Identification String........................................ 21
System Interface String................................................................... 22
Table 12. Device Geometry Definition ............................................ 22
Table 13. Primary Vendor-Specific Extended Query ...................... 23
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 24
Reading Array Data ................................................................24
Reset Command .....................................................................24
Autoselect Command Sequence ............................................24
Enter SecSi Sector/Exit SecSi Sector Command Sequence ..25
Byte/Word Program Command Sequence .............................25
Unlock Bypass Command Sequence ..................................25
Figure 3. Program Operation ......................................................... 26
Chip Erase Command Sequence ...........................................26
Sector Erase Command Sequence ........................................26
Erase Suspend/Erase Resume Commands ...........................27
Figure 4. Erase Operation.............................................................. 27
Table 14. Command Definitions...................................................... 28
Table 15. Autoselect Device ID Codes .......................................... 28
Write Operation Status . . . . . . . . . . . . . . . . . . . . 29
DQ7: Data# Polling .................................................................29
Figure 5. Data# Polling Algorithm .................................................. 29
RY/BY#: Ready/Busy# ............................................................ 30
DQ6: Toggle Bit I ....................................................................30
Figure 6. Toggle Bit Algorithm........................................................ 30
DQ2: Toggle Bit II ...................................................................31
Reading Toggle Bits DQ6/DQ2 ...............................................31
DQ5: Exceeded Timing Limits ................................................31
DQ3: Sector Erase Timer .......................................................31
Table 16. Write Operation Status ................................................... 32
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 33
Operating Ranges. . . . . . . . . . . . . . . . . . . . . . . . . 33
Industrial (I) Devices ............................................................33
V
CC
f/V
CC
s Supply Voltage ...................................................33
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 34
CMOS Compatible ..................................................................34
SRAM DC and Operating Characteristics . . . . . 35
Zero-Power Flash .................................................................36
Figure 9. I
CC1
Current vs. Time (Showing Active and Automatic Sleep
Currents)........................................................................................ 36
Figure 10. Typical I
CC1
vs. Frequency............................................ 36
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 11. Test Setup.................................................................... 37
Table 17. Test Specifications ......................................................... 37
Key To Switching Waveforms . . . . . . . . . . . . . . . 37
Figure 12. Input Waveforms and Measurement Levels ................. 37
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38
SRAM CE#s Timing ................................................................38
Figure 13. Timing Diagram for Alternating Between
SRAM to Flash............................................................................... 38
Flash Read-Only Operations .................................................39
Figure 14. Read Operation Timings............................................... 39
Hardware Reset (RESET#) ....................................................40
Figure 15. Reset Timings............................................................... 40
Flash Word/Byte Configuration (CIOf) ....................................41
Figure 16. CIOf Timings for Read Operations................................ 41
Figure 17. CIOf Timings for Write Operations................................ 41
Flash Erase and Program Operations ....................................42
Figure 18. Program Operation Timings.......................................... 43
Figure 19. Accelerated Program Timing Diagram.......................... 43
Figure 20. Chip/Sector Erase Operation Timings .......................... 44
Figure 21. Back-to-back Read/Write Cycle Timings ...................... 45
Figure 22. Data# Polling Timings (During Embedded Algorithms). 45
Figure 23. Toggle Bit Timings (During Embedded Algorithms)...... 46
Figure 24. DQ2 vs. DQ6................................................................. 46
Temporary Sector/Sector Block Unprotect .............................47
Figure 25. Temporary Sector/Sector Block Unprotect
Timing Diagram.............................................................................. 47
Figure 26. Sector/Sector Block Protect and Unprotect
Timing Diagram.............................................................................. 48
相關PDF資料
PDF描述
AM42DL1642DB70IT Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM42DL1642DB85IS Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM42DL1642DB85IT Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM42DL1642DT30IS Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM42DL1642DT30IT Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
相關代理商/技術參數(shù)
參數(shù)描述
AM42DL1642DB70IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM42DL1642DB85IS 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM42DL1642DB85IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM42DL1642DT30IS 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM42DL1642DT30IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
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