參數(shù)資料
型號(hào)： AM41DL6408H8H85IT
廠商： Advanced Micro Devices, Inc.
元件分類： SRAM
英文描述： Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
中文描述： 堆疊式多芯片封裝（MCP）閃存和SRAM
文件頁(yè)數(shù)： 58/66頁(yè)
文件大?。?/td> 1123K
代理商： AM41DL6408H8H85IT
56
Am41DL6408H
November 24, 2003
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
SRAM Write Cycle
Notes:
1. WE# controlled, if CIOs is low, ignore UB#s and LB#s timing.
2. t
CW
is measured from CE1#s going low to the end of write.
3. t
WR
is measured from the end of write to the address change. t
WR
applied in case a write ends as CE1#s or WE# going high.
4. t
AS
is measured from the address valid to the beginning of write.
5. A write occurs during the overlap (t
WP
) of low CE#1 and low WE#. A write begins when CE1#s goes low and WE# goes low when
asserting UB#s or LB#s for a single byte operation or simultaneously asserting UB#s and LB#s for a double byte operation. A
write ends at the earliest transition when CE1#s goes high and WE# goes high. The t
WP
is measured from the beginning of write
to the end of write.
Figure 31.
SRAM Write Cycle—WE# Control
Parameter
Symbol
Description
Speed
Unit
71
70
85
t
WC
Write Cycle Time
Min
55
70
85
ns
t
Cw
Chip Enable to End of Write
Min
45
60
70
ns
t
AS
Address Setup Time
Min
0
ns
t
AW
Address Valid to End of Write
Min
45
60
70
ns
t
BW
UB#s, LB#s to End of Write
Min
45
60
70
ns
t
WP
Write Pulse Time
Min
40
50
60
ns
t
WR
Write Recovery Time
Min
0
ns
t
WHZ
Write to Output High-Z
Min
0
ns
Max
20
25
t
DW
Data to Write Time Overlap
Min
25
30
35
ns
t
DH
Data Hold from Write Time
Min
0
ns
t
OW
End Write to Output Low-Z
min
5
ns
Address
CE1#s
Data Undefined
WE#
Data In
Data Out
t
WC
t
CW
(See Note 1)
t
AW
High-Z
High-Z
Data Valid
CE2s
t
CW
(See Note 1)
t
WP
(See Note 4)
t
AS
(See Note 3)
t
WR
t
DW
t
DH
t
OW
t
WHZ
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AM41LV3204MB10I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
AM41LV3204MB10IS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
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AM41LV3204MT10I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
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