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  • 參數(shù)資料
    型號: AM29SL800CT-120FI
    英文描述: 10MS, 8 PDIP, IND TEMP, 1.8V(SERIAL EE)
    中文描述: x8/x16閃存EEPROM
    文件頁數(shù): 21/50頁
    文件大小: 979K
    代理商: AM29SL800CT-120FI
    Am29SL160C
    21
    Table 11.
    Primary Vendor-Specific Extended Query
    COMMAND DEFINITIONS
    Writing specific address and data commands or
    sequences into the command register initiates device
    operations. Table 12 defines the valid register
    command sequences. Writing
    incorrect
    address and
    data values
    or writing them in the
    improper sequence
    resets the device to reading array data.
    All addresses are latched on the falling edge of WE# or
    CE#, whichever happens later. All data is latched on
    the rising edge of WE# or CE#, whichever happens
    first. Refer to the appropriate timing diagrams in the
    “AC Characteristics” section.
    Reading Array Data
    The device is automatically set to reading array data
    after device power-up. No commands are required to
    retrieve data. The device is also ready to read array
    data after completing an Embedded Program or
    Embedded Erase algorithm.
    After the device accepts an Erase Suspend command,
    the device enters the Erase Suspend mode. The
    system can read array data using the standard read
    timings, except that if it reads at an address within
    erase-suspended sectors, the device outputs status
    data. After completing a programming operation in the
    Erase Suspend mode, the system may once again
    read array data with the same exception. See “Erase
    Suspend/Erase Resume Commands” for more infor-
    mation on this mode.
    The system
    must
    issue the reset command to re-
    enable the device for reading array data if DQ5 goes
    high, or while in the autoselect mode. See the “Reset
    Command” section, next.
    See also “Requirements for Reading Array Data” in the
    “Device Bus Operations” section for more information.
    The table provides the read parameters, and Figure 13
    shows the timing diagram.
    Reset Command
    Writing the reset command to the device resets the
    device to reading array data. Address bits are don’t
    care for this command.
    The reset command may be written between the
    sequence cycles in an erase command sequence
    before erasing begins. This resets the device to reading
    array data. Once erasure begins, however, the device
    ignores reset commands until the operation is
    complete.
    The reset command may be written between the
    sequence cycles in a program command sequence
    Addresses
    (Word Mode)
    Addresses
    (Byte Mode)
    Data
    Description
    40h
    41h
    42h
    80h
    82h
    84h
    0050h
    0052h
    0049h
    Query-unique ASCII string “PRI”
    43h
    86h
    0031h
    Major version number, ASCII
    44h
    88h
    0030h
    Minor version number, ASCII
    45h
    8Ah
    0000h
    Address Sensitive Unlock
    0 = Required, 1 = Not Required
    46h
    8Ch
    0002h
    Erase Suspend
    0 = Not Supported, 1 = To Read Only, 2 = To Read & Write
    47h
    8Eh
    0001h
    Sector Protect
    0 = Not Supported, X = Number of sectors in per group
    48h
    90h
    0001h
    Sector Temporary Unprotect
    00 = Not Supported, 01 = Supported
    49h
    92h
    0004h
    Sector Protect/Unprotect scheme
    01 = 29F040 mode, 02 = 29F016 mode,
    03 = 29F400 mode, 04 = 29LV800A mode
    4Ah
    94h
    0000h
    Simultaneous Operation
    00 = Not Supported, 01 = Supported
    4Bh
    96h
    0000h
    Burst Mode Type
    00 = Not Supported, 01 = Supported
    4Ch
    98h
    0000h
    Page Mode Type
    00 = Not Supported, 01 = 4 Word Page, 02 = 8 Word Page
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