參數(shù)資料
型號: AM29PL160C
英文描述: 16 Mbit (2 M x 8-Bit/1 M x 16-Bit) CMOS High Performance Page Mode
中文描述: 16兆位(2米× 8位/ 1個(gè)M x 16位)的CMOS高性能頁面模式
文件頁數(shù): 34/67頁
文件大小: 635K
代理商: AM29PL160C
32
Am29PDL129H
August 8, 2003
P R E L I M I N A R Y
Table 12.
Device Geometry Definition
Addresses
Data
Description
27h
0018h
Device Size = 2
N
byte
28h
29h
0001h
0000h
Flash Device Interface description (refer to CFI publication 100)
2Ah
2Bh
0000h
0000h
Max. number of byte in multi-byte write = 2
N
(00h = not supported)
2Ch
0003h
Number of Erase Block Regions within device
2Dh
2Eh
2Fh
30h
0007h
0000h
0020h
0000h
Erase Block Region 1 Information
(refer to the CFI specification or CFI publication 100)
31h
32h
33h
34h
00FDh
0000h
0000h
0001h
Erase Block Region 2 Information
(refer to the CFI specification or CFI publication 100)
35h
36h
37h
38h
0007h
0000h
0020h
0000h
Erase Block Region 3 Information
(refer to the CFI specification or CFI publication 100)
39h
3Ah
3Bh
3Ch
0000h
0000h
0000h
0000h
Erase Block Region 4 Information
(refer to the CFI specification or CFI publication 100)
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AM29PL160CB-90EI 5-SOT23, Pb/HALO FREE, 1.8V(SERIAL EE)
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