參數(shù)資料
型號(hào)： AM29PL131DCB
英文描述： User Programmable Special Function ASIC
中文描述： 用戶可編程ASIC的特殊功能
文件頁(yè)數(shù)： 13/67頁(yè)
文件大?。?/td> 635K
代理商： AM29PL131DCB
August 8, 2003
Am29PDL129H
11
P R E L I M I N A R Y
The random or initial page access is t
ACC
or t
CE
and
subsequent page read accesses (as long as the loca-
tions specified by the microprocessor fall within that
page) are t
PACC
. When CE1# and CE2# are deas-
serted (CE1#=CE2#=V
IH
), the reassertion of CE1# or
CE2# for subsequent access has access time of t
ACC
or t
CE
. Here again, CE1#/CE2# selects the device and
OE# is the output control and should be used to gate
data to the output inputs if the device is selected. Fast
page mode accesses are obtained by keeping
A21–A3 constant and changing A2 to A0 to select the
specific word within that page.
Table 2.
Page Select
Simultaneous Operation
In addition to the conventional features (read, pro-
gram, erase-suspend read, and erase-suspend pro-
gram), the device is capable of reading data from one
bank of memory while a program or erase operation is
in progress in another bank of memory (simultaneous
operation), The bank can be selected by bank ad-
dresses (A21–A20) with zero latency.
The simultaneous operation can execute multi-func-
tion mode in the same bank.
Table 3.
Bank Select
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE1# or CE2# to V
IL
, and OE# to V
IH
.
The device features an
Unlock Bypass
mode to facil-
itate faster programming. Once a bank enters the Un-
lock Bypass mode, only two write cycles are required
to program a word, instead of four. The “Word Pro-
gram Command Sequence” section has details on
programming data to the device using both standard
and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sec-
tors, or the entire device.
Table 4
indicates the address
space that each sector occupies. A “bank address” is
the address bits required to uniquely select a bank.
Similarly, a “sector address” refers to the address bits
required to uniquely select a sector. The “Command
Definitions” section has details on erasing a sector or
the entire chip, or suspending/resuming the erase op-
eration.
I
CC2
in the DC Characteristics table represents the ac-
tive current specification for the write mode. The
AC
Characteristics
section contains timing specification
tables and timing diagrams for write operations.
Accelerated Program Operation
The device offers accelerated program operations
through the ACC function. This function is primarily in-
tended to allow faster manufacturing throughput at the
factory.
If the system asserts V
HH
on this pin, the device auto-
matically enters the aforementioned Unlock Bypass
mode, temporarily unprotects any protected sectors,
and uses the higher voltage on the pin to reduce the
time required for program operations. The system
would use a two-cycle program command sequence
as required by the Unlock Bypass mode. Removing
V
HH
from the WP#/ACC pin returns the device to nor-
mal operation.
Note that V
HH
must not be asserted on
WP#/ACC for operations other than accelerated pro-
gramming, or device damage may result. In addition,
the WP#/ACC pin should be raised to V
CC
when not in
use. That is, the WP#/ACC pin should not be left float-
ing or unconnected; inconsistent behavior of the de-
vice may result.
Autoselect Functions
If the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ15–DQ0. Standard read cycle timings apply in
this mode. Refer to the
Autoselect Mode
and
Autose-
lect Command Sequence
sections for more informa-
tion.
Word
A2
A1
A0
Word 0
0
0
0
Word 1
0
0
1
Word 2
0
1
0
Word 3
0
1
1
Word 4
1
0
0
Word 5
1
0
1
Word 6
1
1
0
Word 7
1
1
1
Bank
CE1#
CE2#
A21–A20
Bank 1A
0
1
00, 01, 10
Bank 1B
0
1
11
Bank 2A
1
0
00
Bank 2B
1
0
01, 10, 11
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