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參數(shù)資料
| 型號： | AM29PDL127H63VKI |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| 中文描述： | 8M X 16 FLASH 3V PROM, 65 ns, PBGA80 |
| 封裝： | 11.50 X 9 MM, 0.80 MM PITCH, FBGA-80 |
| 文件頁數(shù)： | 46/68頁 |
| 文件大?。?/td> | 750K |
| 代理商： | AM29PDL127H63VKI |
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48
Am29PDL127H
June 30, 2003
ADV ANCE
I N FO RMAT I O N
TEST CONDITIONS
Table 16.
Test Specifications
KEY TO SWITCHING WAVEFORMS
2.7 k
CL
6.2 k
3.3 V
Device
Under
Test
Note: Diodes are IN3064 or equivalent
Figure 10.
Test Setup
Test Condition
All Speeds
Unit
Output Load
1 TTL gate
Output Load Capacitance, C
L
(including jig capacitance)
70
pF
Input Rise and Fall Times
5
ns
Input Pulse Levels
0.0–3.0
V
Input timing measurement
reference levels
1.5
V
Output timing measurement
reference levels
1.5
V
WAVEFORM
INPUTS
OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
3.0 V
0.0 V
1.5 V
Output
Measurement Level
Input
Figure 11.
Input Waveforms and Measurement Levels
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