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參數(shù)資料
| 型號： | AM29LV640ML120RPCI |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control |
| 中文描述： | 4M X 16 FLASH 3V PROM, 120 ns, PBGA64 |
| 封裝： | 13 X 11 MM, 1 MM PITCH, BGA-64 |
| 文件頁數(shù)： | 29/62頁 |
| 文件大?。?/td> | 602K |
| 代理商： | AM29LV640ML120RPCI |
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December 14, 2005
Am29LV640MH/L
27
D A T A S H E E T
■
Load a value that is greater than the page buffer
size during the Number of Locations to Program
step.
■
Write to an address in a sector different than the
one specified during the Write-Buffer-Load com-
mand.
■
Write an Address/Data pair to a different
write-buffer-page than the one selected by the
Starting Address during the write buffer data load-
ing stage of the operation.
■
Write data other than the Confirm Command after
the specified number of data load cycles.
The abort condition is indicated by DQ1 = 1, DQ7 =
DATA# (for the last address location loaded), DQ6 =
toggle, and DQ5=0. A Write-to-Buffer-Abort Reset
command sequence must be written to reset the de-
vice for the next operation. Note that the full 3-cycle
Write-to-Buffer-Abort Reset command sequence is re-
quired when using Write-Buffer-Programming features
in Unlock Bypass mode.
Accelerated Program
The device offers accelerated program operations
through the WP#/ACC pin. When the system asserts
V
HH
on the WP#/ACC pin, the device automatically en-
ters the Unlock Bypass mode. The system may then
write the two-cycle Unlock Bypass program command
sequence. The device uses the higher voltage on the
WP#/ACC pin to accelerate the operation.
Note that
the
WP#/
ACC pin must not be at V
HH
for operations
other than accelerated programming, or device dam-
age may result. In addition, no external pullup is nec-
essary since the WP#/ACC pin has internal pullup to
V
CC
.
Figure 5 illustrates the algorithm for the program oper-
ation. Refer to the
Erase and Program Operations
table in the AC Characteristics section for parameters,
and Figure 17 for timing diagrams.
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