參數(shù)資料
型號: AM29LV640ML101RFI
廠商: ADVANCED MICRO DEVICES INC
元件分類: PROM
英文描述: 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control
中文描述: 4M X 16 FLASH 3V PROM, 100 ns, PDSO56
封裝: REVERSE, MO-142, TSOP-56
文件頁數(shù): 40/62頁
文件大?。?/td> 602K
代理商: AM29LV640ML101RFI
38
Am29LV640MH/L
December 14, 2005
D A T A S H E E T
Note:
The system should recheck the toggle bit even if DQ5 = “1” because the toggle
bit may stop toggling as DQ5 changes to “1.” See the subsections on DQ6 and DQ2
for more information.
Figure 9.
Toggle Bit Algorithm
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indi-
cates whether a particular sector is actively erasing
(that is, the Embedded Erase algorithm is in progress),
or whether that sector is erase-suspended. Toggle Bit
II is valid after the rising edge of the final WE# pulse in
the command sequence.
DQ2 toggles when the system reads at addresses
within those sectors that have been selected for era-
sure. (The system may use either OE# or CE# to con-
trol the read cycles.) But DQ2 cannot distinguish
whether the sector is actively erasing or is erase-sus-
pended. DQ6, by comparison, indicates whether the
device is actively erasing, or is in Erase Suspend, but
cannot distinguish which sectors are selected for era-
sure. Thus, both status bits are required for sector and
mode information. Refer to
Table 12
to compare out-
puts for DQ2 and DQ6.
Figure 9 shows the toggle bit algorithm in flowchart
form, and the section “DQ2: Toggle Bit II” explains the
algorithm. See also the
RY/BY#: Ready/Busy#
sub-
section. Figure 21 shows the toggle bit timing diagram.
START
No
Yes
Yes
DQ5 = 1
No
Yes
Toggle Bit
= Toggle
No
Program/Erase
Operation Not
Complete, Write
Reset Command
Program/Erase
Operation Complete
Read DQ7–DQ0
Toggle Bit
= Toggle
Read DQ7–DQ0
Twice
Read DQ7–DQ0
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