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參數(shù)資料
| 型號： | AM29LV256MH113EF |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 256 Megabit (16 M x 16-Bit/32 M x 8-Bit) MirrorBitTM 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/OTM Control |
| 中文描述： | 256兆位（16 M中的x 16-Bit/32 M中的x 8位）MirrorBitTM 3.0伏特，只有統(tǒng)一閃存部門與VersatileI /價外控制 |
| 文件頁數(shù)： | 37/69頁 |
| 文件大小： | 546K |
| 代理商： | AM29LV256MH113EF |
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December 16, 2005
Am29LV256M
35
D A T A S H E E T
Load a value that is greater than the page buffer
size during the Number of Locations to Program
step.
Write to an address in a sector different than the
one specified during the Write-Buffer-Load com-
mand.
Write an Address/Data pair to a different
write-buffer-page than the one selected by the
Starting Address during the write buffer data load-
ing stage of the operation.
Write data other than the Confirm Command after
the specified number of data load cycles.
The abort condition is indicated by DQ1 = 1, DQ7 =
DATA# (for the last address location loaded), DQ6 =
toggle, and DQ5=0. A Write-to-Buffer-Abort Reset
command sequence must be written to reset the de-
vice for the next operation. Note that the full 3-cycle
Write-to-Buffer-Abort Reset command sequence is re-
quired when using Write-Buffer-Programming features
in Unlock Bypass mode.
Programming is allowed in any sequence and across
sector boundaries.
A bit cannot be programmed
from “0” back to a “1.”
Attempting to do so may
cause the device to set DQ5 = 1, or cause the DQ7
and DQ6 status bits to indicate the operation was suc-
cessful. However, a succeeding read will show that the
data is still “0.” Only erase operations can convert a “0”
to a “1.”
Accelerated Program
The device offers accelerated program operations
through the WP#/ACC pin. When the system asserts
V
HH
on the WP#/ACC pin, the device automatically en-
ters the Unlock Bypass mode. The system may then
write the two-cycle Unlock Bypass program command
sequence. The device uses the higher voltage on the
WP#/ACC pin to accelerate the operation.
Note that
the
WP#/
ACC pin must not be at V
HH
for operations
other than accelerated programming, or device dam-
age may result. WP# has an internal pullup; when un-
connected, WP# is at V
IH
.
Figure 5
illustrates the algorithm for the program oper-
ation. Refer to the
Erase and Program Operations
table in the AC Characteristics section for parameters,
and Figure 16 for timing diagrams.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29LV256MH113EI | 256 Megabit (16 M x 16-Bit/32 M x 8-Bit) MirrorBitTM 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/OTM Control |
| AM29LV256MH113FF | 256 Megabit (16 M x 16-Bit/32 M x 8-Bit) MirrorBitTM 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/OTM Control |
| AM29LV256MH113FI | 256 Megabit (16 M x 16-Bit/32 M x 8-Bit) MirrorBitTM 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/OTM Control |
| AM29LV256MH113PGF | 256 Megabit (16 M x 16-Bit/32 M x 8-Bit) MirrorBitTM 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/OTM Control |
| AM29LV256MH113PGI | 256 Megabit (16 M x 16-Bit/32 M x 8-Bit) MirrorBitTM 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/OTM Control |
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