- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366494 > AM29LV200BB-55TSI (Advanced Micro Devices, Inc.) 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory PDF資料下載
參數(shù)資料
| 型號： | AM29LV200BB-55TSI |
| 廠商： | Advanced Micro Devices, Inc. |
| 元件分類： | FLASH |
| 英文描述： | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| 中文描述： | 2兆位（256Kx8Bit/128Kx16位），3.0伏的CMOS引導扇區(qū)閃存 |
| 文件頁數(shù)： | 18/46頁 |
| 文件大?。?/td> | 716K |
| 代理商： | AM29LV200BB-55TSI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
16
Am29LV200B
21521D6 October 10, 2006
DA T A S HE E T
DQ7, DQ6, or RY/BY#. See “Write Operation Status”
for information on these status bits.
Any commands written to the device during the
Embedded Program Algorithm are ignored. Note that a
hardware reset
immediately terminates the program-
ming operation. The Byte Program command
sequence should be reinitiated once the device has
reset to reading array data, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries.
A bit cannot be programmed
from a “0” back to a “1”.
Attempting to do so may halt
the operation and set DQ5 to “1”, or cause the Data#
Polling algorithm to indicate the operation was suc-
cessful. However, a succeeding read will show that the
data is still “0”. Only erase operations can convert a “0”
to a “1”.
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to
program bytes or words to the device faster than using
the standard program command sequence. The unlock
bypass command sequence is initiated by first writing
two unlock cycles. This is followed by a third write cycle
containing the unlock bypass command, 20h. The
device then enters the unlock bypass mode. A two-
cycle unlock bypass program command sequence is all
that is required to program in this mode. The first cycle
in this sequence contains the unlock bypass program
command, A0h; the second cycle contains the program
address and data. Additional data is programmed in
the same manner. This mode dispenses with the initial
two unlock cycles required in the standard program
command sequence, resulting in faster total program-
ming time. Table 5 shows the requirements for the
command sequence.
During the unlock bypass mode, only the Unlock
Bypass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset
command sequence. The first cycle must contain the
program address and the data 90h. The second cycle
need only contain the data 00h. The device then
returns to reading array data.
Figure 3 illustrates the algorithm for the program oper-
ation. See the Erase/Program Operations table in “AC
Characteristics” for parameters, and to Figure 17 for
timing diagrams.
Note:
See Table 5 for program command sequence.
Figure 3. Program Operation
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase
command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does
not
require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations. Table 5 shows
the address and data requirements for the chip erase
command sequence.
Any commands written to the chip during the
Embedded Erase algorithm are ignored. Note that a
hardware reset
during the chip erase operation imme-
diately terminates the operation. The Chip Erase
command sequence should be reinitiated once the
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
相關PDF資料 |
PDF描述 |
|---|---|
| AM29LV200BB-55TSK | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV200BB-55TWAC | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV200BB-55TWAD | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV200BB-55TWAE | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV200BB-55TWAF | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM29LV200BB-90EC | 制造商:Advanced Micro Devices 功能描述:NOR Flash, 128K x 16, 48 Pin, Plastic, TSSOP |
| AM29LV200BB-90FC | 制造商:Advanced Micro Devices 功能描述:2 Mb (128K x 16) Boot Sector, Flash Memory |
| AM29LV256MH120RPGI | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 256MBIT 32MX8/16MX16 120NS 64BGA - Trays |
| AM29LV256MH123RPGI | 制造商:Advanced Micro Devices 功能描述: |
| AM29LV256MH94REI | 制造商:Spansion 功能描述:256M (32MX8/16MX16) 3V REG, MIRRORBIT, TSOP56, IND - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復。