
October 10, 2006  21521D6
Am29LV200B
17
D AT A  S H E E T
device has returned to reading array data, to ensure 
data integrity.
The system can determine the status of the erase oper-
ation by using DQ7, DQ6, DQ2, or RY/BY#. See “Write 
Operation Status” for information on these status bits.
When the Embedded Erase algorithm is complete, the 
device returns to reading array data and addresses are 
no longer latched. 
Figure 4 illustrates the algorithm for the erase opera-
tion. See the Erase/Program Operations tables in “AC 
Characteristics” for parameters, and to Figure 18 for 
timing diagrams.
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector 
erase command sequence is initiated by writing two 
unlock cycles, followed by a set-up command. Two 
additional unlock write cycles are then followed by the 
address of the sector to be erased, and the sector 
erase command. Table 5 shows the address and data 
requirements for the sector erase command sequence.
The device does 
not
 require the system to preprogram 
the memory prior to erase. The Embedded Erase algo-
rithm automatically programs and verifies the sector for 
an all zero data pattern prior to electrical erase. The 
system is not required to provide any controls or 
timings during these operations. 
After the command sequence is written, a sector erase 
time-out of 50 μs begins. During the time-out period, 
additional sector addresses and sector erase com-
mands may be written. Loading the sector erase buffer 
may be done in any sequence, and the number of 
sectors may be from one sector to all sectors. The time 
between these additional cycles must be less than 50 
μs, otherwise the last address and command might not 
be accepted, and erasure may begin. It is recom-
mended that processor interrupts be disabled during 
this time to ensure all commands are accepted. The 
interrupts can be re-enabled after the last Sector Erase 
command is written. If the time between additional 
sector erase commands can be assumed to be less 
than 50 μs, the system need not monitor DQ3. 
Any 
command other than Sector Erase or Erase 
Suspend during the time-out period resets the 
device to reading array data.
 The system must 
rewrite the command sequence and any additional 
sector addresses and commands.
The system can monitor DQ3 to determine if the sector 
erase timer has timed out. (See the “DQ3: Sector Erase 
Timer” section.) The time-out begins from the rising 
edge of the final WE# pulse in the command sequence.
Once the sector erase operation has begun, only the 
Erase Suspend command is valid. All other commands 
are ignored. Note that a 
hardware reset
 during the 
sector erase operation immediately terminates the 
operation. The Sector Erase command sequence 
should be reinitiated once the device has returned to 
reading array data, to ensure data integrity.
When the Embedded Erase algorithm is complete, the 
device returns to reading array data and addresses are 
no longer latched. The system can determine the 
status of the erase operation by using DQ7, DQ6, DQ2, 
or RY/BY#. (Refer to “Write Operation Status” for infor-
mation on these status bits.)
Figure 4 illustrates the algorithm for the erase opera-
tion. Refer to the Erase/Program Operations tables in 
the “AC Characteristics” section for parameters, and to 
Figure 18 for timing diagrams.
Erase Suspend/Erase Resume Commands
The Erase Suspend command allows the system to 
interrupt a sector erase operation and then read data 
from, or program data to, any sector not selected for 
erasure. This command is valid only during the sector 
erase operation, including the 50 μs time-out period 
during the sector erase command sequence. The 
Erase Suspend command is ignored if written during 
the chip erase operation or Embedded Program algo-
rithm. Writing the Erase Suspend command during the 
Sector Erase time-out immediately terminates the 
time-out period and suspends the erase operation. 
Addresses are “don’t-cares” when writing the Erase 
Suspend command.
When the Erase Suspend command is written during a 
sector erase operation, the device requires a maximum 
of 20 μs to suspend the erase operation. However, 
when the Erase Suspend command is written during 
the sector erase time-out, the device immediately ter-
minates the time-out period and suspends the erase 
operation.
After the erase operation has been suspended, the 
system can read array data from or program data to 
any sector not selected for erasure. (The device “erase 
suspends” all sectors selected for erasure.) Normal 
read and write timings and command definitions apply. 
Reading at any address within erase-suspended 
sectors produces status data on DQ7–DQ0. The 
system can use DQ7, or DQ6 and DQ2 together, to 
determine if a sector is actively erasing or is erase-sus-
pended. See “Write Operation Status” for information 
on these status bits.
After an erase-suspended program operation is com-
plete, the system can once again read array data within 
non-suspended sectors. The system can determine 
the status of the program operation using the DQ7 or 
DQ6 status bits, just as in the standard program oper-
ation. See “Write Operation Status” for more 
information.
The system may also write the autoselect command 
sequence when the device is in the Erase Suspend