參數資料
型號： AM29LV160BT-90FC
英文描述： x8/x16 Flash EEPROM
中文描述： x8/x16閃存EEPROM
文件頁數： 3/35頁
文件大?。?/td> 744K
代理商： AM29LV160BT-90FC
Am29LV040B
3
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . .4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . .6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering information . . . . . . . . . . . . . . . . . . . . . . .7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .8
Table 1. Am29LV040B Device Bus Operations................................ 8
Requirements for Reading Array Data .....................................8
Writing Commands/Command Sequences ..............................8
Program and Erase Operation Status ......................................9
Standby Mode ..........................................................................9
Automatic Sleep Mode .............................................................9
Output Disable Mode ................................................................9
Table 2. Am29LV040BT Sector Address Table................................ 9
Autoselect Mode .......................................................................9
Table 3. Am29LV040B Autoselect Codes (High Voltage Method).. 10
Sector Protection/Unprotection ...............................................10
Hardware Data Protection ......................................................10
Low V
CC
Write Inhibit ..............................................................10
Write Pulse “Glitch” Protection ...............................................10
Logical Inhibit ..........................................................................10
Power-Up Write Inhibit ............................................................10
Command Definitions . . . . . . . . . . . . . . . . . . . . . .11
Reading Array Data ................................................................11
Reset Command .....................................................................11
Autoselect Command Sequence ............................................11
Byte Program Command Sequence .......................................11
Unlock Bypass Command Sequence .....................................12
Chip Erase Command Sequence ...........................................12
Figure 1. Program Operation ..........................................................12
Sector Erase Command Sequence ........................................13
Erase Suspend/Erase Resume Commands ...........................13
Figure 2. Erase Operation ...............................................................14
Command Definitions .............................................................15
Table 4. Am29LV040B Command Definitions................................. 15
Write Operation Status . . . . . . . . . . . . . . . . . . . . .16
DQ7: Data# Polling .................................................................16
Figure 3. Data# Polling Algorithm ...................................................16
DQ6: Toggle Bit I ....................................................................17
DQ2: Toggle Bit II ...................................................................17
Reading Toggle Bits DQ6/DQ2 ..............................................17
Figure 4. Toggle Bit Algorithm .........................................................18
DQ5: Exceeded Timing Limits ................................................18
DQ3: Sector Erase Timer .......................................................18
Table 5. Write Operation Status..................................................... 19
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 20
Figure 5. Maximum Negative Overshoot Waveform ...................... 20
Figure 6. Maximum Positive Overshoot Waveform ........................ 20
Operating Ranges. . . . . . . . . . . . . . . . . . . . . . . . . 20
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 7. I
CC1
Current vs. Time (Showing Active and Automatic
Sleep Currents) .............................................................................. 22
Figure 8. Typical I
CC1
vs. Frequency ............................................. 22
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 9. Test Setup ....................................................................... 23
Table 6. Test Specifications........................................................... 23
Key to Switching Waveforms. . . . . . . . . . . . . . . . 23
Figure 10. Input Waveforms and Measurement Levels ................. 23
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 24
Read Operations ....................................................................24
Figure 11. Read Operations Timings ............................................. 24
Erase/Program Operations .....................................................25
Figure 12. Program Operation Timings .......................................... 26
Figure 13. Chip/Sector Erase Operation Timings .......................... 26
Figure 14. Data# Polling Timings (During Embedded Algorithms) . 27
Figure 15. Toggle Bit Timings (During Embedded Algorithms) ...... 27
Figure 16. DQ2 vs. DQ6 ................................................................. 28
Alternate CE# Controlled Erase/Program Operations ............29
Figure 17. Alternate CE# Controlled Write Operation Timings ...... 30
Erase and Programming Performance . . . . . . . 31
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 31
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 31
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 32
TS 032—32-Pin Standard TSOP ............................................32
TSR032—32-Pin Reverse TSOP ...........................................33
PL 032—32-Pin Plastic Leaded Chip Carrier .........................34
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 35
Revision A (January 1998) .....................................................35
Revision B (April 1998) ...........................................................35
Revision B+1 (November 1998) .............................................35
Revision C (January 1999) .....................................................35
Revision C+1 (May 18, 1999) .................................................35
Revision C+2 (July 20, 1999) .................................................35
Revision D (November 11, 1999) ...........................................35
Revision D+1 (November 13, 2000) .......................................35
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