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參數(shù)資料
| 型號： | AM29LV116DB-90EF |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| 中文描述： | 16兆位（2米× 8位）的CMOS 3.0伏，只引導扇區(qū)閃存 |
| 文件頁數(shù)： | 4/43頁 |
| 文件大?。?/td> | 421K |
| 代理商： | AM29LV116DB-90EF |
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Am29LV116D
21359E5 September12,2006
D A T A S H E E T
GENERAL DESCRIPTION
The Am29LV116D is a 16 Mbit, 3.0 Volt-only Flash
memory organized as 2,097,152 bytes. The device is
offered in a 40-pin TSOP package. The byte-wide (x8)
data appears on DQ7–DQ0. All read, program, and
erase operations are accomplished using only a single
power supply. The device can also be programmed in
standard EPROM programmers.
The standard device offers access times of 70, 90, and
120 ns, allowing high speed microprocessors to
operate without wait states. To eliminate bus contention
the device has separate chip enable (CE#), write
enable (WE#) and output enable (OE#) controls.
The device requires only a
single 3.0 volt power sup-
ply
for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard
. Com-
mands are written to the command register using stan-
dard microprocessor write timings. Register contents
serve as input to an internal state-machine that con-
trols the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the
programming and erase operations. Reading data out
of the device is similar to reading from other Flash or
EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the
Embedded
Program
algorithm—an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin. The
Unlock Bypass
mode facili-
tates faster programming times by requiring only two
write cycles to program data instead of four.
Device erasure occurs by executing the erase com-
mand sequence. This initiates the
Embedded Erase
algorithm—an internal algorithm that automatically
preprograms the array (if it is not already programmed)
before executing the erase operation. During erase, the
device automatically times the erase pulse widths and
verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle)
status bits
. After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
The
sector erase architecture
allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The
hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved in-system or via program-
ming equipment.
The
Erase Suspend
feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The
hardware RESET# pin
terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The device offers two power-saving features. When ad-
dresses have been stable for a specified amount of
time, the device enters the
automatic sleep mode
.
The system can also place the device into the
standby
mode
. Power consumption is greatly reduced in both
these modes.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The device electrically erases all bits within
a sector simultaneously via Fowler-Nordheim tun-
neling. The data is programmed using hot electron injec-
tion.
相關PDF資料 |
PDF描述 |
|---|---|
| AM29LV116DB-70FC | 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV116DB-90FC | 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV116DB-90FI | 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV116DT-120 | 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV116DT-120EC | 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM29LV116DT-70EC | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 16M-Bit 2M x 8 70ns 40-Pin TSOP |
| AM29LV116DT-90EI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Advanced Micro Devices 功能描述: |
| AM29LV128MH103REI | 制造商:Spansion 功能描述:NOR Flash Parallel 3.3V 128Mbit 16M/8M x 8bit/16bit 100ns 56-Pin TSOP |
| AM29LV128MH113REI | 制造商:Spansion 功能描述:NOR Flash Parallel 3.3V 128Mbit 16M/8M x 8bit/16bit 110ns 56-Pin TSOP |
| AM29LV128MH113RFI | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 128MBIT 16MX8/8MX16 110NS 56TSOP - Trays |
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