Publication#
23544
Issue Date:
January 10, 2002
Rev:
B
Amendment/
0
Refer to AMD’s Website (www.amd.com) for the latest information.
Am29LV065D
64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only
Uniform Sector Flash Memory with VersatileIO
TM
Control
DISTINCTIVE CHARACTERISTICS
I
Single power supply operation
— 3.0 to 3.6 volt read, erase, and program operations
I
VersatileIO
TM
control
— Device generates output voltages and tolerates input
voltages on the DQ I/Os as determined by the voltage
on V
IO
input
I
High performance
— Access times as fast as 90 ns
I
Manufactured on 0.23 μm process technology
I
CFI (Common Flash Interface) compliant
—
Provides device-specific information to the system,
allowing host software to easily reconfigure for
different Flash devices
I
SecSi (Secured Silicon) Sector region
—
256-byte sector for permanent, secure identification
through an 16-byte random Electronic Serial Number
—
May be programmed and locked at the factory or by
the customer
—
Accessible through a command sequence
I
Ultra low power consumption (typical values at 3.0 V,
5 MHz)
—
9 mA typical active read current
—
26 mA typical erase/program current
—
200 nA typical standby mode current
I
Flexible sector architecture
—
One hundred twenty-eight 64 Kbyte sectors
I
Sector Protection
—
A hardware method to lock a sector to prevent
program or erase operations within that sector
—
Sectors can be locked in-system or via programming
equipment
—
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
I
Embedded Algorithms
—
Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
—
Embedded Program algorithm automatically writes
and verifies data at specified addresses
I
Compatibility with JEDEC standards
—
Pinout and software compatible with single-power
supply Flash
—
Superior inadvertent write protection
I
Minimum 1 million erase cycle guarantee per sector
I
Package options
—
48-pin TSOP (standard or reverse pinout)
—
63-ball FBGA
I
Erase Suspend/Erase Resume
—
Suspends an erase operation to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation
I
Data# Polling and toggle bits
—
Provides a software method of detecting program or
erase operation completion
I
Unlock Bypass Program command
—
Reduces overall programming time when issuing
multiple program command sequences
I
Ready/Busy# pin (RY/BY#)
—
Provides a hardware method of detecting program or
erase cycle completion
I
Hardware reset pin (RESET#)
—
Hardware method to reset the device for reading array
data
I
ACC pin
—
Accelerates programming time for higher throughput
during system production
I
Program and Erase Performance (V
HH
not applied to
the ACC input pin)
—
Byte program time: 5 μs typical
—
Sector erase time: 0.9 s typical for each 64 Kbyte
sector
I
20-year data retention at 125
°
C
—
Reliable operation for the life of the system