參數(shù)資料
型號： AM29LV033MUU101RFI
廠商： Advanced Micro Devices, Inc.
英文描述： 32 Megabit (4 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
中文描述： 32兆位（4個M × 8位）的MirrorBit 3.0伏特，只有統(tǒng)一閃存部門與VersatileI / O控制
文件頁數(shù)： 4/56頁
文件大?。?/td> 1138K
代理商： AM29LV033MUU101RFI
4
Am29LV033MU
November 11, 2002
A D V A N C E I N F O R M A T I O N
TABLE OF CONTENTS
Product Selector Guide. . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Device Bus Operations .....................................................10
VersatileIO
(V
IO
) Control .....................................................10
Requirements for Reading Array Data ...................................10
Page Mode Read ....................................................................11
Writing Commands/Command Sequences ............................11
Write Buffer .............................................................................11
Accelerated Program Operation .............................................11
Autoselect Functions ..............................................................11
Standby Mode........................................................................ 11
Automatic Sleep Mode ...........................................................11
RESET#: Hardware Reset Pin ...............................................12
Output Disable Mode ..............................................................12
Table 2. Sector Address Table ........................................................13
Autoselect Mode..................................................................... 15
Table 3. Autoselect Codes, (High Voltage Method) .......................15
Sector Group Protection and Unprotection .............................16
Table 4. Sector Group Protection/Unprotection AddressTable .....16
Temporary Sector Group Unprotect .......................................17
Figure 1. Temporary Sector Group UnprotectOperation................ 17
Figure 2. In-System Sector Group Protect/UnprotectAlgorithms... 18
SecSi (Secured Silicon) Sector Flash MemoryRegion ..........19
Table 5. SecSi Sector Contents ......................................................19
Figure 3. SecSi Sector Protect Verify.............................................. 20
Hardware Data Protection ......................................................20
Low VCC Write Inhibit ............................................................20
Write Pulse “Glitch” Protection ...............................................20
Logical Inhibit ..........................................................................20
Power-Up Write Inhibit ............................................................20
Common Flash Memory Interface (CFI). . . . . . . 20
Table 6. CFI Query Identification String.............................. 21
Table 7. System Interface String......................................................21
Table 8. Device Geometry Definition................................... 22
Table 9. Primary Vendor-Specific Extended Query............. 23
Command Definitions . . . . . . . . . . . . . . . . . . . . . 23
Reading Array Data ................................................................23
Reset Command .....................................................................24
Autoselect Command Sequence ............................................24
Enter SecSi Sector/Exit SecSi Sector CommandSequence ..24
Byte Program Command Sequence .......................................24
Unlock Bypass Command Sequence .....................................25
Write Buffer Programming ......................................................25
Accelerated Program ..............................................................26
Figure 4. Write Buffer Programming Operation............................... 27
Figure 5. Program Operation.......................................................... 28
Program Suspend/Program Resume Command Sequence ...28
Figure 6. Program Suspend/Program Resume............................... 29
Chip Erase Command Sequence ...........................................29
Sector Erase Command Sequence ........................................29
Figure 7. Erase Operation............................................................... 30
Erase Suspend/Erase Resume Commands ...........................30
Command Definitions............................................................. 31
Table 10. Command Definitions......................................................31
Write Operation Status. . . . . . . . . . . . . . . . . . . . . 32
DQ7: Data# Polling .................................................................32
Figure 8. Data# Polling Algorithm.................................................. 32
RY/BY#: Ready/Busy#............................................................ 33
DQ6: Toggle Bit I ....................................................................33
Figure 9. Toggle Bit Algorithm........................................................ 34
DQ2: Toggle Bit II ...................................................................34
Reading Toggle Bits DQ6/DQ2 ...............................................34
DQ5: Exceeded Timing Limits ................................................35
DQ3: Sector Erase Timer .......................................................35
DQ1: Write-to-Buffer Abort .....................................................35
Table 11. Write Operation Status ...................................................35
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 36
Figure 10. Maximum Negative OvershootWaveform................... 36
Figure 11. Maximum Positive OvershootWaveform..................... 36
Operating Ranges. . . . . . . . . . . . . . . . . . . . . . . . . 36
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 37
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 12. Test Setup.................................................................... 38
Table 12. Test Specifications .........................................................38
Key to Switching Waveforms. . . . . . . . . . . . . . . . 38
Figure 13. Input Waveforms and
Measurement Levels...................................................................... 38
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39
Read-Only Operations ...........................................................39
Figure 14. Read Operation Timings............................................... 39
Figure 15. Page Read Timings...................................................... 40
Hardware Reset (RESET#) ....................................................41
Figure 16. Reset Timings............................................................... 41
Erase and Program Operations ..............................................42
Figure 17. Program Operation Timings.......................................... 43
Figure 18. Accelerated Program Timing Diagram.......................... 43
Figure 19. Chip/Sector Erase Operation Timings.......................... 44
Figure 20. Data# Polling Timings
(During Embedded Algorithms)...................................................... 45
Figure 21. Toggle Bit Timings
(During Embedded Algorithms)...................................................... 46
Figure 22. DQ2 vs. DQ6................................................................. 46
Temporary Sector Unprotect ..................................................47
Figure 23. Temporary Sector Group Unprotect TimingDiagram... 47
Figure 24. Sector Group Protect and Unprotect TimingDiagram.. 48
Alternate CE# Controlled Erase and ProgramOperations .....49
Figure 25. Alternate CE# Controlled Write (Erase/Program)
OperationTimings.......................................................................... 50
Erase And Programming Performance. . . . . . . . 51
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 51
TSOP Pin and BGA Package Capacitance . . . . . 51
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 52
TS 040—40-Pin Standard Thin Small Outline Package .........52
TSR040—40-Pin Reverse Thin Small Outline Package .........53
FBC048—48-Ball Fine-Pitch Ball Grid Array
9 x 8 mm Package ..................................................................54
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 55
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