Am29F040B
3
TABLE OF CONTENTS
Product Selector Guide. . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . 7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 8
Table 1. Am29F040B Device Bus Operations ...................................8
Requirements for Reading Array Data ..................................... 8
Writing Commands/Command Sequences .............................. 8
Program and Erase Operation Status ...................................... 8
Standby Mode .......................................................................... 8
Output Disable Mode................................................................ 9
Table 2. Sector Addresses Table ......................................................9
Autoselect Mode..................................................................... 10
Table 3. Am29F040B Autoselect Codes (High Voltage Method).....10
Sector Protection/Unprotection............................................... 10
Hardware Data Protection...................................................... 10
Low V
CC
Write Inhibit...................................................................... 10
Write Pulse “Glitch” Protection........................................................ 10
Logical Inhibit.................................................................................. 10
Power-Up Write Inhibit.................................................................... 10
Command Definitions . . . . . . . . . . . . . . . . . . . . . 11
Reading Array Data................................................................ 11
Reset Command..................................................................... 11
Autoselect Command Sequence............................................ 11
Byte Program Command Sequence....................................... 11
Figure 1. Program Operation ......................................................... 12
Chip Erase Command Sequence........................................... 12
Sector Erase Command Sequence........................................ 12
Erase Suspend/Erase Resume Commands........................... 13
Figure 2. Erase Operation.............................................................. 13
Command Definitions............................................................. 14
Table 4. Am29F040B Command Definitions....................................14
Write Operation Status . . . . . . . . . . . . . . . . . . . . 15
DQ7: Data# Polling................................................................. 15
Figure 3. Data# Polling Algorithm .................................................. 15
DQ6: Toggle Bit I.................................................................... 16
DQ2: Toggle Bit II................................................................... 16
Reading Toggle Bits DQ6/DQ2 .............................................. 16
DQ5: Exceeded Timing Limits................................................ 16
DQ3: Sector Erase Timer....................................................... 17
Figure 4. Toggle Bit Algorithm........................................................ 17
Table 5. Write Operation Status.......................................................18
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 19
Figure 5. Maximum Negative Overshoot Waveform..................... 19
Figure 6. Maximum Positive Overshoot Waveform....................... 19
Operating Ranges. . . . . . . . . . . . . . . . . . . . . . . . . 19
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 20
TTL/NMOS Compatible .......................................................... 20
CMOS Compatible.................................................................. 20
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 7. Test Setup..................................................................... 21
Table 6. Test Specifications........................................................... 21
Key to Switching Waveforms. . . . . . . . . . . . . . . . 21
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 22
Read Only Operations............................................................ 22
Figure 8. Read Operation Timings................................................ 22
Erase and Program Operations.............................................. 23
Figure 9. Program Operation Timings........................................... 24
Figure 10. Chip/Sector Erase Operation Timings ......................... 24
Figure 11. Data# Polling Timings (During Embedded Algorithms) 25
Figure 12. Toggle Bit Timings (During Embedded Algorithms)..... 25
Figure 13. DQ2 vs. DQ6................................................................ 26
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27
Erase and Program Operations.............................................. 27
Alternate CE# Controlled Writes.................................................... 27
Figure 14. Alternate CE# Controlled Write Operation Timings ..... 28
Erase and Programming Performance . . . . . . . . 29
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 29
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . 29
PLCC and PDIP Pin Capacitance. . . . . . . . . . . . . 30
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 31
PD 032—32-Pin Plastic DIP................................................... 31
PL 032—32-Pin Plastic Leaded Chip Carrier ......................... 32
TS 032—32-Pin Standard Thin Small Package...................... 33
TSR032—32-Pin Reversed Thin Small Outline Package....... 34
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 35
Revision A (May 1997) ........................................................... 35
Revision B (January 1998) ..................................................... 35
Revision B+1 (January 1998)................................................. 35
Revision B+2 (April 1998)....................................................... 35
Revision C (January 1999)..................................................... 35
Revision C+1 (February 1999) ............................................... 35
Revision C+2 (May 17, 1999)................................................. 35
Revision D (November 15, 1999) ........................................... 35
Revision E (November 29, 2000)............................................ 35