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參數(shù)資料
| 型號： | AM29F004BB-120JI |
| 英文描述： | -55V Single P-Channel HEXFET Power MOSFET in a D2-Pak package; Similar to IRF4905S with Lead Free packaging |
| 中文描述： | x8閃存EEPROM的 |
| 文件頁數(shù)： | 14/39頁 |
| 文件大小： | 728K |
| 代理商： | AM29F004BB-120JI |
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14
Am29F002B/Am29F002NB
interrupts can be re-enabled after the last Sector Erase
command is written. If the time between additional
sector erase commands can be assumed to be less
than 50 μs, the system need not monitor DQ3.
Any
command other than Sector Erase or Erase
Suspend during the time-out period resets the
device to reading array data.
The system must
rewrite the command sequence and any additional
sector addresses and commands.
The system can monitor DQ3 to determine if the sector
erase timer has timed out. (See the “DQ3: Sector Erase
Timer” section.) The time-out begins from the rising
edge of the final WE# pulse in the command sequence.
Once the sector erase operation has begun, only the
Erase Suspend command is valid. All other commands
are ignored. On the Am29F002B only, note that a
hard-
ware reset
during the sector erase operation
immediately terminates the operation. The Sector
Erase command sequence should be reinitiated once
the device has returned to reading array data, to
ensure data integrity.
When the Embedded Erase algorithm is complete, the
device returns to reading array data and addresses are
no longer latched. The system can determine the
status of the erase operation by using DQ7, DQ6, or
DQ2. Refer to “Write Operation Status” for information
on these status bits.
Figure 3 illustrates the algorithm for the erase opera-
tion. Refer to the Erase/Program Operations tables in
the “AC Characteristics” section for parameters, and to
the Sector Erase Operations Timing diagram for timing
waveforms.
Notes:
1. See the appropriate Command Definitions table for erase
command sequence.
2.
See “DQ3: Sector Erase Timer” for more information.
Figure 3.
Erase Operation
START
Write Erase
Command Sequence
Data Poll
from System
Data = FFh
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29F004BB-55JI | x8 Flash EEPROM |
| AM29F004BB-70JI | x8 Flash EEPROM |
| AM29F004BB-90JE | -100V Single P-Channel HEXFET Power MOSFET in a TO-262 package; A IRF9540NL with Standard Packaging |
| AM29F010-55PC5 | -55V Single P-Channel HEXFET Power MOSFET in a TO-220AB package; Similar to the IRF9Z24N with Lead-Free Packaging. |
| AM29F010-55PE5 | x8 Flash EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29F004BB-55JI | 制造商:Advanced Micro Devices 功能描述:Flash Mem Parallel 5V 4M-Bit 512K x 8 55ns 32-Pin PLCC |
| AM29F010 | 制造商:Panasonic Industrial Company 功能描述:IC |
| AM29F010-120DGC1 | 制造商:Spansion 功能描述:1M FLASH KNOWN GOOD DIE (COMMERCIAL TEMP) - Gel-pak, waffle pack, wafer, diced wafer on film |
| AM29F010-120DGE1 | 制造商:Spansion 功能描述:1M FLASH KNOWN GOOD DIE (EXTEND TEMP) - Gel-pak, waffle pack, wafer, diced wafer on film |
| AM29F010-120DGI1 | 制造商:Spansion 功能描述:1M FLASH KNOWN GOOD DIE (INDUSTRIAL TEMP) - Gel-pak, waffle pack, wafer, diced wafer on film |
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