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參數資料
| 型號： | AM29F002BT-70EI |
| 英文描述： | -55V Single P-Channel HEXFET Power MOSFET in a TO-220AB package; A IRF9Z34N with Standard Packaging |
| 中文描述： | x8閃存EEPROM的 |
| 文件頁數： | 1/39頁 |
| 文件大?。?/td> | 728K |
| 代理商： | AM29F002BT-70EI |
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This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Publication#
21527
Issue Date:
November 28, 2000
Rev:
D
Amendment/
0
Am29F002B/Am29F002NB
2 Megabit (256 K x 8-Bit)
CMOS 5.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
I
Single power supply operation
— 5.0 Volt-only operation for read, erase, and
program operations
— Minimizes system level requirements
I
Manufactured on 0.32 μm process technology
— Compatible with 0.5 μm Am29F002 device
I
High performance
— Access times as fast as 55 ns
I
Low power consumption (typical values at
5 MHz)
— 1 μA standby mode current
— 20 mA read current
— 30 mA program/erase current
I
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
three 64 Kbyte sectors
— Supports full chip erase
— Sector Protection features:
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked via programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
I
Top or bottom boot block configurations available
I
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
I
Minimum 1,000,000 write cycle guarantee per
sector
I
20-year data retention at 125
°
C
— Reliable operation for the life of the system
I
Package option
— 32-pin PDIP
— 32-pin TSOP
— 32-pin PLCC
I
Compatibility with JEDEC standards
— Pinout and software compatible with
single-power supply Flash
— Superior inadvertent write protection
I
Data# Polling and toggle bits
— Provides a software method of detecting
program or erase operation completion
I
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
I
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
array data (not available on Am29F002NB)
相關PDF資料 |
PDF描述 |
|---|---|
| AM29F002BT-70JC | -100V Single P-Channel HEXFET Power MOSFET in a TO-220AB package; A IRF5210 with Standard Packaging |
| AM29F002BT-70JI | -40V Single P-Channel HEXFET Power MOSFET in a SO-8 package; A IRF7241 with Standard Packaging |
| AM29F002BT-70PC | x8 Flash EEPROM |
| AM29F002BT-70PI | -30V Single P-Channel HEXFET Power MOSFET in a SO-8 package; Similar to IRF7406 with Lead Free Packaging |
| AM29F002BT-90EC | x8 Flash EEPROM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AM29F002BT70JI | 制造商:Advanced Micro Devices 功能描述: |
| AM29F002BT-70JI | 制造商:Spansion 功能描述:NOR Flash Parallel 5V 2Mbit 256K x 8bit 70ns 32-Pin PLCC |
| AM29F002BT-90JC | 制造商:Advanced Micro Devices 功能描述: 制造商:Advanced Micro Devices 功能描述:NOR Flash, 256K x 8, 32 Pin, Plastic, PLCC |
| AM29F002NB-55JC | 制造商:Advanced Micro Devices 功能描述:256K X 8 FLASH 5V PROM, 55 ns, PQCC32 |
| AM29F002NB-55PC | 制造商:Advanced Micro Devices 功能描述:256K X 8 FLASH 5V PROM, 55 ns, PDIP32 |
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