參數(shù)資料
型號(hào): AM29DL324GB12PCI
廠商: SPANSION LLC
元件分類: PROM
英文描述: 2M X 16 FLASH 3V PROM, 120 ns, PBGA64
封裝: 11 X 13 MM, 1 MM PITCH, FORTIFIED, BGA-64
文件頁數(shù): 38/59頁
文件大?。?/td> 1404K
代理商: AM29DL324GB12PCI
September 27, 2004
Am29DL32xG
41
DA T A SH EET
AC CHARACTERISTICS
Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
Parameter
Speed Options
JEDEC
Std
Description
70
90
120
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
70
90
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
45
50
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
35
45
50
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
30
35
50
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
WHWH1
t
WHWH1
Programming Operation (Note 2)
Byte
Typ
5
s
Word
Typ
7
t
WHWH1
t
WHWH1
Accelerated Programming Operation,
Word or Byte (Note 2)
Typ
4
s
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.4
sec
t
VCS
V
CC Setup Time (Note 1)
Min
50
s
t
RB
Write Recovery Time from RY/BY#
Min
0
ns
t
BUSY
Program/Erase Valid to RY/BY# Delay
Min
90
ns
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