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參數(shù)資料
| 型號(hào)： | AM29BL162CB-80RDTI1 |
| 元件分類： | EEPROM |
| 英文描述： | EEPROM |
| 中文描述： | EEPROM的 |
| 文件頁數(shù)： | 1/47頁 |
| 文件大?。?/td> | 753K |
| 代理商： | AM29BL162CB-80RDTI1 |
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This Data Sheet states AMD’s current specifications regarding the Products described herein. This Data Sheet may
be revised by subsequent versions or modifications due to changes in technical specifications.
Publication#
22142
Issue Date:
November 21, 2000
Rev:
F
Amendment/
+1
Refer to AMD’s Website (www.amd.com) for the latest information.
Am29BL162C
16 Megabit (1 M x 16-Bit)
CMOS 3.0 Volt-only Burst Mode Flash Memory
DISTINCTIVE CHARACTERISTICS
I
32 words sequential with wrap around (linear
32), bottom boot
I
One 8 Kword, two 4 Kword, one 112 Kword, and
seven 128 Kword sectors
I
Single power supply operation
— Regulated voltage range: 3.0 to 3.6 volt read and
write operations and for compatibility with high
performance 3.3 volt microprocessors
I
Read access times
Burst access times as fast as 17 ns at industrial
temperature range (18 ns at extended
temperature range)
Initial/random access times as fast as 65 ns
I
Alterable burst length via BAA# pin
I
Power dissipation (typical)
— Burst Mode Read: 15 mA @ 25 MHz,
20 mA @ 33 MHz, 25 mA @ 40 MHz
— Program/Erase: 20 mA
— Standby mode, CMOS: 3 μA
I
5 V-tolerant data, address, and control signals
I
Sector Protection
— Implemented using in-system or via
programming equipment
— Temporary Sector Unprotect feature allows code
changes in previously locked sectors
I
Unlock Bypass Program Command
— Reduces overall programming time when
issuing multiple program command sequences
I
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
I
Minimum 100,000 erase cycle guarantee
per sector
I
20-year data retention
I
CFI (Common Flash Interface) compliant
— Provides device-specific information to the
system, allowing host software to easily
reconfigure for different Flash devices
I
Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
— Backward-compatible with AMD Am29LVxxx
and Am29Fxxx flash memories: powers up in
asynchronous mode for system boot, but can
immediately be placed into burst mode
I
Data# Polling and toggle bits
— Provides a software method of detecting
program or erase operation completion
I
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completion
I
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
I
Hardware reset pin (RESET#)
— Hardware method to reset the device for reading
array data
I
Package Option
— 56-pin SSOP
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