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參數(shù)資料
| 型號(hào)： | AM29BL162CB-70R |
| 廠商： | Spansion Inc. |
| 英文描述： | 16 Megabit (1 M x 16-Bit) CMOS 3.0 Volt-only Burst Mode Flash Memory |
| 中文描述： | 16兆位（1米× 16位）的CMOS 3.0伏特，只有突發(fā)模式閃存 |
| 文件頁數(shù)： | 17/50頁 |
| 文件大?。?/td> | 486K |
| 代理商： | AM29BL162CB-70R |
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July 8, 2005
Am29BL162C
15
D A T A S H E E T
COMMON FLASH MEMORY INTERFACE
(CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-indepen-
dent, JEDEC ID-independent, and forward- and back-
ward-compatible for the specified flash device families.
Flash vendors can standardize their existing interfaces
for long-term compatibility.
This device enters the CFI Query mode when the
system writes the CFI Query command, 98h, to
address 55h, any time the device is ready to read array
data. The system can read CFI information at the
addresses given in Tables
4
–
7
. To terminate reading
CFI data, the system must write the reset command.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables
4
–
7
. The
system must write the reset command to return the
device to the autoselect mode.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the World
Wide Web at http://www.amd.com/products/nvd/over-
view/cfi.html. Alternatively, contact an AMD represen-
tative for copies of these documents.
To terminate reading CFI data, the system must write
the reset command.
Table 4.
CFI Query Identification String
Addresses
Data
Description
10h
11h
12h
0051h
0052h
0059h
Query Unique ASCII string “QRY”
13h
14h
0002h
0000h
Primary OEM Command Set
15h
16h
0040h
0000h
Address for Primary Extended Table
17h
18h
0000h
0000h
Alternate OEM Command Set (00h = none exists)
19h
1Ah
0000h
0000h
Address for Alternate OEM Extended Table (00h = none exists)
Table 5.
System Interface String
Addresses
Data
Description
1Bh
0027h
V
CC
Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Ch
0036h
V
CC
Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Dh
0000h
V
PP
Min. voltage (00h = no V
PP
pin present)
1Eh
0000h
V
PP
Max. voltage (00h = no V
PP
pin present)
Typical timeout per single word write 2
N
μs
1Fh
0004h
20h
0000h
Typical timeout for Min. size buffer write 2
N
μs (00h = not supported)
21h
000Ah
Typical timeout per individual block erase 2
N
ms
22h
0000h
Typical timeout for full chip erase 2
N
ms (00h = not supported)
23h
0005h
Max. timeout for word write 2
N
times typical
24h
0000h
Max. timeout for buffer write 2
N
times typical
25h
0004h
Max. timeout per individual block erase 2
N
times typical
26h
0000h
Max. timeout for full chip erase 2
N
times typical (00h = not supported)
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