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| 型號： | AM28F512A-200EE |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory with Embedded Algorithms |
| 中文描述： | 64K X 8 FLASH 12V PROM, 200 ns, PDSO32 |
| 封裝： | TSOP-32 |
| 文件頁數(shù)： | 34/34頁 |
| 文件大?。?/td> | 463K |
| 代理商： | AM28F512A-200EE |
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Am28F512A
9
FUNCTIONAL DESCRIPTION
Description Of User Modes
Table 1.
Am28F512A Device Bus Operations (Notes 7 and 8)
Legend:
X = Don’t care, where Don’t Care is either VIL or VIH levels. VPPL = VPP < VCC + 2 V. See DC Characteristics for voltage levels
of VPPH. 0 V < An < VCC + 2 V, (normal TTL or CMOS input levels, where n = 0 or 9).
Notes:
1. VPPL may be grounded, connected with a resistor to ground, or < VCC + 2.0 V. VPPH is the programming voltage specified for
the device. Refer to the DC characteristics. When VPP = VPPL, memory contents can be read but not written or erased.
2. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 2.
3. 11.5 < VID < 13.0 V. Minimum VID rise time and fall time (between 0 and VID voltages) is 500 ns.
4. Read operation with VPP = VPPH may access array data or the Auto select codes.
5. With VPP at high voltage, the standby current is ICC + IPP (standby).
7. All inputs are Don’t Care unless otherwise stated, where Don’t Care is either VIL or VIH levels. In the Auto select mode all
addresses except A9 and A0 must be held at VIL.
8. If VCC ≤ 1.0 Volt, the voltage difference between VPP and VCC should not exceed 10.0 volts. Also, the Am28F256 has a VPP
Operation
CE#
(E#)
OE#
(G#)
WE#
(W#)
VPP
(Note 1)
A0
A9
I/O
Read-Only
Read
VIL
XVPPL
A0
A9
DOUT
Standby
VIH
XX
VPPL
X
HIGH Z
Output Disable
VIL
VIH
VPPL
X
HIGH Z
Auto-select Manufacturer
Code (Note 2)
VIL
VIH
VPPL
VIL
VID
(Note 3)
CODE
(01h)
Auto-select Device
Code (Note 2)
VIL
VIH
VPPL
VIH
VID
(Note 3)
CODE
(AEh)
Read/Write
Read
VIL
VIH
VPPH
A0
A9
DOUT
(Note 4)
Standby (Note 5)
VIH
XX
VPPH
X
HIGH Z
Output Disable
VIL
VIH
VPPH
X
HIGH Z
Write
VIL
VIH
VIL
VPPH
A0
A9
DIN
(Note 6)
相關PDF資料 |
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| AM28F512A-200EEB | Quadruple 2-Input Positive-NAND Gates 14-TVSOP -40 to 85 |
| AM28F512A-200EI | Quadruple 2-Input Positive-NAND Gates 14-TVSOP -40 to 85 |
| AM28F512A-200EIB | 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory with Embedded Algorithms |
| AM28F512A-200FC | Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85 |
| AM28F512A-200FCB | Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85 |
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