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    參數(shù)資料
    型號(hào): AM28F512-200EI
    廠商: ADVANCED MICRO DEVICES INC
    元件分類(lèi): PROM
    英文描述: 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
    中文描述: 64K X 8 FLASH 12V PROM, 200 ns, PDSO32
    封裝: TSOP-32
    文件頁(yè)數(shù): 14/35頁(yè)
    文件大?。?/td> 484K
    代理商: AM28F512-200EI
    14
    Am28F512
    Figure 2.
    AC Waveforms For Erase Operations
    ANALYSIS OF ERASE TIMING WAVEFORM
    Note:
    This analysis does not include the requirement
    to program the entire array to 00h data prior to erasure.
    Refer to the Flashrite
    Programming algorithm.
    Erase Setup/Erase
    This analysis illustrates the use of two-cycle erase
    commands (section A and B). The first erase com-
    mand (20h) is a Setup command and does not affect
    the array data (section A). The second erase com-
    mand (20h) initiates the erase operation (section B)
    on the rising edge of this WE# pulse. All bytes of the
    memory array are erased in parallel. No address infor-
    mation is required.
    The erase pulse occurs in section C.
    Time-Out
    A software timing routine (10 ms duration) must be ini-
    tiated on the rising edge of the WE# pulse of section B.
    Note:
    An integrated stop timer prevents any possibil-
    ity of overerasure by limiting each time-out period of
    10 ms.
    Erase-Verify
    Upon completion of the erase software timing routine,
    the microprocessor must write the Erase-verify com-
    mand (A0h). This command terminates the erase oper-
    ation on the rising edge of the WE# pulse (section D).
    The Erase-verify command also stages the device for
    data verification (section F).
    After each erase operation each byte must be verified.
    The byte address to be verified must be supplied with
    Addresses
    CE
    #
    OE
    #
    WE
    #
    Data
    V
    PP
    V
    CC
    11559G-7
    20h
    20h
    Section
    A0h
    Data
    Out
    Bus Cycle
    Write
    Write
    Time-out
    Write
    Time-out
    Read
    Standby
    Command
    20h
    20h
    N/A
    A0h
    N/A
    Compare
    Data
    N/A
    Function
    Erase
    Setup
    Erase
    Erase
    (10 ms)
    Erase-
    Verify
    Transition
    (6 μs)
    Erase
    Verification
    Proceed per
    Erase
    Algorithm
    A
    B
    D
    E
    F
    C
    G
    A
    B
    D
    E
    F
    C
    G
    相關(guān)PDF資料
    PDF描述
    AM28F512-200EIB 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
    AM28F512-200FC Dual J-K Flip-Flops with Clear 14-SOIC 0 to 70
    AM28F512-200FCB 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
    AM28F512-200FE 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
    AM28F512-200FEB Dual J-K Flip-Flops with Clear 14-SOIC 0 to 70
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