參數(shù)資料
型號: AM27C040-120JC
廠商: ADVANCED MICRO DEVICES INC
元件分類: PROM
英文描述: 4 Megabit (512 K x 8-Bit) CMOS EPROM
中文描述: 512K X 8 OTPROM, 120 ns, PQCC32
封裝: PLASTIC, LCC-32
文件頁數(shù): 10/13頁
文件大小: 175K
代理商: AM27C040-120JC
10
Am27C040
F I N A L
AC CHARACTERISTICS
Caution
: Do not remove the device from (or inserted into) a socket when V
CC
or V
PP
is applied.
Notes:
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. This parameter is sampled and not 100% tested.
3. Switching characteristics are over operating range, unless otherwise specified.
4. See Figure 1 and Table 1 for test specifications.
SWITCHING WAVEFORMS
PACKAGE CAPACITANCE
Notes:
1. This parameter is only sampled and not 100% tested.
2. T
A
= +25
°
C, f = 1 MHz.
Parameter Symbols
Description
Test Setup
Am27C040
Unit
JEDEC
Std.
-90
-120
-150
-200
t
AVQV
t
ACC
Address to Output Delay
CE# = OE#
= V
IL
Max
90
120
150
200
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
90
120
150
200
ns
t
GLQV
t
OE
Output Enable to Output Delay
CE# = V
IL
Max
40
50
65
75
ns
t
EHQZ
t
GHQZ
t
DF
(Note 2)
Chip Enable High or Output Enable High,
Whichever Occurs First, to Output High Z
Max
30
30
30
40
ns
t
AXQX
t
OH
Output Hold Time from Addresses, CE# or
OE#, Whichever Occurs First
Min
0
0
0
0
ns
Parameter
Symbol
Parameter
Description
Test
Conditions
CDV032
PD 032
PL 032
Unit
Typ
Max
Typ
Max
Typ
Max
C
IN
Input Capacitance
V
IN
= 0 V
10
12
10
12
8
10
pF
C
OUT
Output Capacitance V
OUT
= 0 V
12
15
12
15
9
12
pF
Addresses
CE#/PGM#
OE#
Output
Addresses Valid
High Z
High Z
t
CE
Valid Output
2.4
0.45
2.0
0.8
2.0
0.8
t
ACC
(Note 1)
t
OE
t
DF
(Note 2)
t
OH
Note:
1. OE# may be delayed up to t
ACC
- t
OE
after the falling edge of the addresses without impact on t
ACC.
2. t
DF
is specified from OE# or CE#, whichever occurs first.
14971E-1
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