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參數(shù)資料
| 型號(hào)： | AM26LV32NS |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER |
| 中文描述： | 低壓高速翻兩番差分線路接收器 |
| 文件頁(yè)數(shù)： | 4/18頁(yè) |
| 文件大小： | 370K |
| 代理商： | AM26LV32NS |
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AM26LV32
LOW-VOLTAGE HIGH-SPEED
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D – MAY 1995 – REVISED APRIL 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended supply-voltage and operating free-air temperature
ranges (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIT+
VIT–
VIK
VOH
VOL
IOZ
IIH(E)
IIL(E)
rI
II
ICC
Cpd
All typical values are at VCC = 3.3 V and TA = 25
°
C.
Cpd determines the no-load dynamic current: IS = Cpd
×
VCC
×
f + ICC.
Differential input high-threshold voltage
0.2
V
Differential input low-threshold voltage
–0.2
V
Enable input clamp voltage
II = –18 mA
VID = 200 mV,
VID = –200 mV,
VO = 0 to VCC
VCC = 0 or 3 V,
VCC = 3.6 V,
–0.8
–1.5
V
High-level output voltage
IOH = –5 mA
IOL = 5 mA
2.4
3.2
V
Low-level output voltage
0.17
0.5
±
50
10
V
μ
A
High-impedance-state output current
High-level enable input current
VI = 5.5 V
VI = 0 V
μ
A
Low-level enable input current
–10
Input resistance
7
12
k
μ
A
mA
Input current
VI = 5.5 V or –0.3 V,
VI(E) = VCC or GND,
One channel
All other inputs GND
±
700
17
Supply current
Power dissipation capacitance
No load, line inputs open
8
150
pF
switching characteristics, V
CC
= 3.3 V, T
A
= 25
°
C
PARAMETER
TEST CONDITIONS
MIN
TYP
16
MAX
UNIT
ns
tPLH
tPHL
tt
tPZH
tPZL
tPHZ
tPLZ
tsk(p)§
tsk(o)
tsk(pp)#
§tsk(p) is |tPLH – tPHL| of each channel of the same device.
tsk(o) is the maximum difference in propagation delay times between any two channels of the same device switching in the same direction.
#tsk(pp) is the maximum difference in propagation delay times between any two channels of any two devices switching in the same direction.
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
See Figure 1
8
20
8
16
20
ns
Transistion time (tr or tf)
Output-enable time to high level
See Figure 1
5
ns
See Figure 2
17
40
ns
Output-enable time to low level
See Figure 3
10
40
ns
Output-disable time from high level
See Figure 2
20
40
ns
Output-disable time from low level
See Figure 3
16
40
ns
Pulse skew
4
6
ns
Pulse skew
4
6
ns
Pulse skew (device to device)
6
9
ns
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