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Index
I-4
JNL (Jump If Not Less) instruction, 4-93
JNLE (Jump If Not Less or Equal) instruction, 4-91
JNO (Jump If Not Overflow) instruction, 4-113
JNP (Jump If Not Parity) instruction, 4-124
JNS (Jump If Not Sign) instruction, 4-116
JNZ (Jump If Not Zero) instruction, 4-107
JO (Jump If Overflow) instruction, 4-119
JP (Jump If Parity) instruction, 4-122
JPE (Jump If Parity Even) instruction, 4-122
JPO (Jump If Parity Odd) instruction, 4-124
JS (Jump If Sign) instruction, 4-126
JZ (Jump If Zero) instruction, 4-89
L
LAHF (Load AH with Flags) instruction, 4-129
LDS (Load DS with Segment and Register with Offset)
instruction, 4-131
LEA (Load Effective Address) instruction, 4-133
LEAVE (Leave High-Level Procedure) instruction, 4-135
LES (Load ES with Segment and Register with Offset)
instruction, 4-138
LOCK (Lock the Bus) instruction, 4-140
LODS (Load String Component) instruction, 4-141
LODSB (Load String Byte) instruction, 4-141
LODSW (Load String Word) instruction, 4-141
logical operation instructions
AND (Logical AND) instruction, 4-17
list of, 3-8
NOT (One’s Complement Negation) instruction, 4-167
OR (Logical Inclusive OR) instruction, 4-169
RCL (Rotate through Carry Left) instruction, 4-187
RCR (Rotate through Carry Right) instruction, 4-189
ROL (Rotate Left) instruction, 4-205
ROR (Rotate Right) instruction, 4-207
SAL (Shift Arithmetic Left) instruction, 4-211
SAR (Shift Arithmetic Right) instruction, 4-214
SHL (Shift Left) instruction, 4-211, 4-224
SHR (Shift Right) instruction, 4-225
XOR (Logical Exclusive OR) instruction, 4-251
LOOP (Loop While CX Register Is Not Zero) instruction,
4-146
LOOPE (Loop If Equal) instruction, 4-148
LOOPNE (Loop If Not Equal) instruction, 4-150
LOOPNZ (Loop If Not Zero) instruction, 4-150
LOOPZ (Loop If Zero) instruction, 4-148
M
memory addressing modes
based indexed mode, 1-7
based indexed mode with displacement, 1-7
based mode, 1-7
direct mode, 1-7
examples, 1-7
indexed mode, 1-7
memory and I/O space, 1-4
memory operands, 1-7
base, 1-7
displacement, 1-7
index, 1-7
MOV (Move Component) instruction, 4-153
MOVS (Move String Component) instruction, 4-156
MOVSB (Move String Byte) instruction, 4-156
MOVSW (Move String Word) instruction, 4-156
MUL (Multiply Unsigned Numbers) instruction, 4-160
N
NEG (Two’s Complement Negation) instruction, 4-163
NOP (No Operation) instruction, 4-165
NOT (One’s Complement Negation) instruction, 4-167
O
opcode, 2-5
operand address
aux field, 2-3
displacement, 2-3
immediate, 2-3
mod field, 2-2
r/m field, 2-3
OR (Logical Inclusive OR) instruction, 4-169
OUT (Output Component to Port) instruction, 4-171
OUTS (Output String Component to Port) instruction,
4-173
OUTSB (Output String Byte to Port) instruction, 4-173
OUTSW (Output String Word to Port) instruction, 4-173
overview
instruction set, 2-1
P
physical-address generation, 1-4
POP (Pop Component from Stack) instruction, 4-175